From: Arnd Bergmann Date: Tue, 27 Dec 2011 22:55:47 +0000 (+0000) Subject: Merge branch 'tegra/soc' into next/soc X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=e195ffbe4573f79d590e63e2ae32dac2a73d5768;p=deliverable%2Flinux.git Merge branch 'tegra/soc' into next/soc * tegra/soc: arm/tegra: Compile tegra_dt_init_irq only when CONFIG_OF arm/tegra: Make MACH_TEGRA_DT depend on ARCH_TEGRA_2x_SOC arm/tegra: Delete tegra_init_clock() arm/tegra: Fix section mismatch errors in tegra30 pinmux arm/tegra: Fix section mismatch errors in tegra20 pinmux arm/tegra: refresh defconfig for tegra30 arm/tegra: add support for tegra30 based board cardhu arm/tegra: implement support for tegra30 arm/tegra: pinmux tables and definitions for tegra30 arm/tegra: add new fields to struct tegra_pingroup_desc arm/tegra: prepare pinmux code for multiple tegra variants arm/tegra: rename tegra20 pinmux files arm/tegra: generalize L2 cache initialization arm/tegra: use PMC reset arm/tegra: rename board-dt.c to board-dt-tegra20.c arm/tegra: prepare early init for multiple tegra variants arm/tegra: don't export clk_measure_input_freq arm/tegra: prepare clock code for multiple tegra variants arm/tegra: cleanup tegra20 support arm/tegra: clk_get should not be fatal Conflicts: arch/arm/mach-tegra/board-dt-tegra20.c --- e195ffbe4573f79d590e63e2ae32dac2a73d5768 diff --cc arch/arm/mach-tegra/board-dt-tegra20.c index 000000000000,ddaa037be028..d1befbedbdea mode 000000,100644..100644 --- a/arch/arm/mach-tegra/board-dt-tegra20.c +++ b/arch/arm/mach-tegra/board-dt-tegra20.c @@@ -1,0 -1,148 +1,148 @@@ + /* + * nVidia Tegra device tree board support + * + * Copyright (C) 2010 Secret Lab Technologies, Ltd. + * Copyright (C) 2010 Google, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + #include + + #include + #include + #include + #include + #include + #include + + #include + #include + + #include "board.h" + #include "board-harmony.h" + #include "clock.h" + #include "devices.h" + + void harmony_pinmux_init(void); + void paz00_pinmux_init(void); + void seaboard_pinmux_init(void); + void trimslice_pinmux_init(void); + void ventana_pinmux_init(void); + + struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL), - OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL), ++ OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL), + OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0", + &tegra_ehci1_device.dev.platform_data), + OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1", + &tegra_ehci2_device.dev.platform_data), + OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", + &tegra_ehci3_device.dev.platform_data), + {} + }; + + static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { + /* name parent rate enabled */ + { "uartd", "pll_p", 216000000, true }, + { "usbd", "clk_m", 12000000, false }, + { "usb2", "clk_m", 12000000, false }, + { "usb3", "clk_m", 12000000, false }, + { "pll_a", "pll_p_out1", 56448000, true }, + { "pll_a_out0", "pll_a", 11289600, true }, + { "cdev1", NULL, 0, true }, + { "i2s1", "pll_a_out0", 11289600, false}, + { "i2s2", "pll_a_out0", 11289600, false}, + { NULL, NULL, 0, 0}, + }; + + static struct of_device_id tegra_dt_match_table[] __initdata = { + { .compatible = "simple-bus", }, + {} + }; + + static struct { + char *machine; + void (*init)(void); + } pinmux_configs[] = { + { "compulab,trimslice", trimslice_pinmux_init }, + { "nvidia,harmony", harmony_pinmux_init }, + { "compal,paz00", paz00_pinmux_init }, + { "nvidia,seaboard", seaboard_pinmux_init }, + { "nvidia,ventana", ventana_pinmux_init }, + }; + + static void __init tegra_dt_init(void) + { + int i; + + tegra_clk_init_from_table(tegra_dt_clk_init_table); + + /* + * Finished with the static registrations now; fill in the missing + * devices + */ + of_platform_populate(NULL, tegra_dt_match_table, + tegra20_auxdata_lookup, NULL); + + for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { + if (of_machine_is_compatible(pinmux_configs[i].machine)) { + pinmux_configs[i].init(); + break; + } + } + + WARN(i == ARRAY_SIZE(pinmux_configs), + "Unknown platform! Pinmuxing not initialized\n"); + } + + static const char *tegra20_dt_board_compat[] = { + "compulab,trimslice", + "nvidia,harmony", + "compal,paz00", + "nvidia,seaboard", + "nvidia,ventana", + NULL + }; + + DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)") + .map_io = tegra_map_common_io, + .init_early = tegra20_init_early, + .init_irq = tegra_dt_init_irq, + .handle_irq = gic_handle_irq, + .timer = &tegra_timer, + .init_machine = tegra_dt_init, + .dt_compat = tegra20_dt_board_compat, + MACHINE_END