From: Thiemo Seufer Date: Wed, 26 Apr 2006 18:19:15 +0000 (+0000) Subject: * mips.h: Improve comments describing the bitfield instruction X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=ef0ee8444316ba374bcf8c7a0007a1b60d658594;p=deliverable%2Fbinutils-gdb.git * mips.h: Improve comments describing the bitfield instruction fields. --- diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index ad4411a2c4..425abdbcf6 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,4 +1,9 @@ -2006-04-07 Joerg Wunsch +2006-04-26 Thiemo Seufer + + * mips.h: Improve comments describing the bitfield instruction + fields. + +2006-04-07 Joerg Wunsch * avr.h (AVR_ISA_PWMx): New. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 4bec5edcc8..ae3f437484 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -268,19 +268,20 @@ struct mips_opcode "x" accept and ignore register name "z" must be zero register "K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD) - "+A" 5 bit ins/ext position, which becomes LSB (OP_*_SHAMT). + "+A" 5 bit ins/ext/dins/dext/dinsm/dextm position, which becomes + LSB (OP_*_SHAMT). Enforces: 0 <= pos < 32. - "+B" 5 bit ins size, which becomes MSB (OP_*_INSMSB). + "+B" 5 bit ins/dins size, which becomes MSB (OP_*_INSMSB). Requires that "+A" or "+E" occur first to set position. Enforces: 0 < (pos+size) <= 32. - "+C" 5 bit ext size, which becomes MSBD (OP_*_EXTMSBD). + "+C" 5 bit ext/dext size, which becomes MSBD (OP_*_EXTMSBD). Requires that "+A" or "+E" occur first to set position. Enforces: 0 < (pos+size) <= 32. (Also used by "dext" w/ different limits, but limits for that are checked by the M_DEXT macro.) - "+E" 5 bit dins/dext position, which becomes LSB-32 (OP_*_SHAMT). + "+E" 5 bit dinsu/dextu position, which becomes LSB-32 (OP_*_SHAMT). Enforces: 32 <= pos < 64. - "+F" 5 bit "dinsm" size, which becomes MSB-32 (OP_*_INSMSB). + "+F" 5 bit "dinsm/dinsu" size, which becomes MSB-32 (OP_*_INSMSB). Requires that "+A" or "+E" occur first to set position. Enforces: 32 < (pos+size) <= 64. "+G" 5 bit "dextm" size, which becomes MSBD-32 (OP_*_EXTMSBD).