From: Tomoya MORINAGA <tomoya.rohm@gmail.com>
Date: Fri, 9 Dec 2011 04:13:28 +0000 (+0900)
Subject: spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=f258b44e22e07f5e98ac2260c70acff5784791b6;p=deliverable%2Flinux.git

spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control

This patch supports a spi mode setup and bit order setup by IO control.
    spi mode:     mode 0 to mode 3
    bit order:    LSB first, MSB first

Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---

diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
index 4fdb83a765d8..5a477e91426f 100644
--- a/drivers/spi/spi-topcliff-pch.c
+++ b/drivers/spi/spi-topcliff-pch.c
@@ -1434,6 +1434,7 @@ static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev)
 	master->num_chipselect = PCH_MAX_CS;
 	master->setup = pch_spi_setup;
 	master->transfer = pch_spi_transfer;
+	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
 
 	data->board_dat = board_dat;
 	data->plat_dev = plat_dev;