From: Nick Clifton <nickc@redhat.com>
Date: Mon, 26 Apr 2021 16:16:20 +0000 (+0100)
Subject: Fix a bug in the ARM emulator which would not allow 4 byte alignment for double word... 
X-Git-Url: http://drtracing.org/?a=commitdiff_plain;h=f6b9562fd912cc507ef4eb8be9ccb9f132810758;p=deliverable%2Fbinutils-gdb.git

Fix a bug in the ARM emulator which would not allow 4 byte alignment for double word stores.

	PR 22790
	* armemu.c (Handle_Store_Double): Allow 4 byte alignment when
	running in v6 mode.
---

diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index aa3c91bb2c..fbd977c372 100644
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,3 +1,9 @@
+2021-04-26  Nick Clifton  <nickc@redhat.com>
+
+	PR 22790
+	* armemu.c (Handle_Store_Double): Allow 4 byte alignment when
+	running in v6 mode.
+
 2021-04-22  Tom Tromey  <tom@tromey.com>
 
 	* configure, config.in: Rebuild.
diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c
index 922c2e498d..f93ad0cee2 100644
--- a/sim/arm/armemu.c
+++ b/sim/arm/armemu.c
@@ -5457,7 +5457,10 @@ Handle_Store_Double (ARMul_State * state, ARMword instr)
     addr = base;
 
   /* The address must be aligned on a 8 byte boundary.  */
-  if (addr & 0x7)
+  if (state->is_v6 && (addr & 0x3) == 0)
+    /* Word alignment is enough for v6.  */
+    ;
+  else if (addr & 0x7)
     {
 #ifdef ABORTS
       ARMul_DATAABORT (addr);