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arm64: Rename RSEQ_ASM_OP_R_BAD_MEMCPY to RSEQ_ASM_OP_R_BYTEWISE_MEMCPY
[librseq.git] / include / rseq / rseq-riscv.h
2024-02-27  Mathieu DesnoyersRename RSEQ_TEMPLATE macros blob | commitdiff | raw
2024-02-22  Michael JeansonAdd 'teardown' parameter to RSEQ_ASM_DEFINE_ABORT on... blob | commitdiff | raw | diff to current
2024-02-22  Mathieu DesnoyersClarify logic of RSEQ_ASM*_CMP* macros blob | commitdiff | raw | diff to current
2023-04-25  Mathieu Desnoyersriscv: Template memory ordering and percpu access mode blob | commitdiff | raw | diff to current
2023-04-25  Mathieu DesnoyersRemove RSEQ_SKIP_FASTPATH code blob | commitdiff | raw | diff to current
2023-04-21  Mathieu DesnoyersAll arch: use rseq_unqual_scalar_typeof in load-acquire blob | commitdiff | raw | diff to current
2023-04-20  Mathieu Desnoyersarchitecture headers: add extra parentheses around... blob | commitdiff | raw | diff to current
2023-04-14  Michael JeansonImplement the REUSE specification for licensing and... blob | commitdiff | raw | diff to current
2023-04-14  Mathieu DesnoyersRelicense librseq to MIT blob | commitdiff | raw | diff to current
2022-06-13  Michael JeansonAdd RISC-V rseq support blob | commitdiff | raw | diff to current
Librseq
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