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[AArch64][PATCH 1/14] Support ARMv8.2 FP16 Adv.SIMD instructions.
[deliverable/binutils-gdb.git]
/
opcodes
/
ChangeLog
2015-12-14
Matthew Wahab
[AArch64][PATCH 1/14] Support ARMv8.2 FP16 Adv.SIMD...
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2015-12-14
Matthew Wahab
[AArch64] Fix errors rebasing the ARMv8.2 AT and system...
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2015-12-12
Alan Modra
Enable 2 operand form of powerpc mfcr with -many
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2015-12-11
Matthew Wahab
[AArch64][Patch 4/5] Support HINT aliases taking operands.
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2015-12-11
Matthew Wahab
[AArch64][Patch 3/5] Adjust maximum number of instructi...
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2015-12-11
Matthew Wahab
[AArch64][Patch 2/5] Add Statistical Profiling Extensio...
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2015-12-10
Matthew Wahab
[Aarch64] Support ARMv8.2 AT instructions
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2015-12-10
Matthew Wahab
[AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction.
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2015-12-10
Matthew Wahab
[AArch64][PATCH 1/2] Add support for ARMv8.2 DC CVAP...
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2015-12-10
Matthew Wahab
[AArch64][binutils] Add support for ARMv8.2 PSTATE...
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2015-12-10
Matthew Wahab
[AArch64][PATCH 2/2] Add RAS system registers.
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2015-12-10
Matthew Wahab
[AArch64][PATCH 1/2] Add support for RAS instruction...
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2015-12-09
H.J. Lu
Implement Intel OSPKE instructions
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2015-12-08
DJ Delorie
rl78: Enable MULU for all ISAs.
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2015-12-07
Alan Modra
Reorder some power9 insns
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2015-12-04
Claudiu Zissulescu
Fix failures in the GAS testsuite for the ARC architecture.
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2015-12-02
Andre Vieira
Fix ldah being disassembled as ldaexh
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2015-11-27
Matthew Wahab
[AArch64][PATCH 3/3] Add floating-point FP16 instructions
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2015-11-27
Matthew Wahab
[AArch64][PATCH 2/3] Adjust a utility function for...
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2015-11-27
Matthew Wahab
[AArch64][PATCH 1/3] Support ARMv8.2 FP16 floating...
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2015-11-27
Matthew Wahab
[AArch64] Add ARMv8.2 instruction alias REV64.
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2015-11-27
Matthew Wahab
[AArch64] Add ARMv8.2 instructions BFC and REV64.
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2015-11-27
Matthew Wahab
[AArch64] Let aliased instructions be their preferred...
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2015-11-27
Matthew Wahab
[Aarch64] Support an ARMv8.2 system register.
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2015-11-23
Tristan Gingold
opcodes: handle mach-o for thumb/arm disambiguation.
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2015-11-20
Matthew Wahab
[AArch64] Add support for ARMv8.1 Virtulization Host...
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2015-11-20
Nick Clifton
Remove a if-clause that is redundant because the same...
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2015-11-20
Nick Clifton
Update translations.
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2015-11-19
Matthew Wahab
[AArch64] Reject invalid immediate operands to MSR PAN
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2015-11-17
Nick Clifton
Fix the disassembly of conditional instructions will...
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2015-11-15
Tristan Gingold
Bump version to 2.26.51
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2015-11-12
Peter Bergner
Add assembler, disassembler and linker support for...
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2015-11-02
Nick Clifton
Disassemble RX NOP instructions as such.
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2015-11-02
Nick Clifton
Fix disassembly of RX zero-offset register indirect...
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2015-10-28
Yao Qi
Pass noaliases_p to aarch64_decode_insn
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2015-10-27
Vinay Kumar
Fix RL78 disassembly of DE+offset addressing to always...
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2015-10-27
Vinay Kumar
Display system registers by their names when disassembl...
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2015-10-27
Vinay Kumar
Fix RL78 disassembly so that SP+OFFSET addressing alway...
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2015-10-14
Andreas Krebbel
Add missing changelog entries
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2015-10-08
Nick Clifton
Fix compile time warning compiling ARC port.
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2015-10-07
Yao Qi
Avoid using 'template' C++ keyword
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2015-10-07
Nick Clifton
New ARC implementation.
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2015-10-02
Yao Qi
[aarch64] expose disas_aarch64_insn and rename it to...
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2015-10-02
Yao Qi
[aarch64] Remove argument pc from disas_aarch64_insn
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2015-09-29
Dominik Vogt
Add support for extensions in the .machine pseudoop...
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2015-09-28
Nick Clifton
Updare French translation for binutils and German trans...
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2015-09-28
Tom Rix
Patches for illegal ppc 500 instructions
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2015-09-23
Nick Clifton
Fix compile time warnings generated when compiling...
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2015-09-22
Nick Clifton
Enhance the RX disassembler to detect and report bad...
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2015-09-22
Anton Blanchard
opcodes/ppc-opc.c: Add dscr and ctrl SPR mnemonics
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2015-08-25
Jose E. Marchesi
Support for the sparc %pmcdper privileged register.
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2015-08-24
Jan Stancek
Fix the partial disassembly of a broken three byte...
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2015-08-21
Alexander Fomin
PR binutils/18257: Properly decode x86/Intel mask instr...
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2015-08-17
Alan Modra
Trailing space in opcodes/ generated files
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2015-08-13
Andre Vieira
Fixes for unpredictable nops and 26-bit versions of...
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2015-08-12
Simon Dardis
[MIPS] Map 'move' to 'or'.
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2015-08-11
Nick Clifton
Fix the disassembly of the AArch64 SIMD EXT instruction.
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2015-08-10
Robert Suchanek
Add SIGRIE instruction for MIPS R6
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2015-08-07
Amit Pawar
Remove CpuFMA4 support from CPU_ZNVER1_FLAGS.
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2015-07-30
H.J. Lu
Properly disassemble movnti in Intel mode
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2015-07-27
H.J. Lu
Regenerate configure files
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2015-07-23
Alan Modra
Fix ubsan signed integer overflow
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2015-07-22
H.J. Lu
Fix memory operand size for vcvtt?ps2u?qq instructions
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2015-07-16
Alessandro Marzocchi
Updates the ARM disassembler's output of floating point...
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2015-07-14
H.J. Lu
Sync config/warnings.m4 with GCC
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2015-07-10
Alan Modra
Add missing changelog entries
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2015-07-03
Alan Modra
Remove ppc860, ppc750cl, ppc7450 insns from common...
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2015-07-01
Sandra Loosemore
Opcodes and assembler support for Nios II R2
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2015-06-30
Amit Pawar
Add support for monitorx/mwaitx instructions
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2015-06-22
Peter Bergner
PPC sync instruction accepts invalid and incompatible...
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2015-06-22
Nick Clifton
Stop "objdump -d" from disassembling past a symbolic...
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2015-06-19
Peter Bergner
Allow for optional operands with non-zero default values.
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2015-06-16
Matthew Wahab
[AArch64] Support id_mmfr4 system register
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2015-06-16
Szabolcs Nagy
Fixes a compile time warnng about left shifting a negat...
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2015-06-12
Peter Bergner
Remove unused MTMSRD_L macro and re-add accidentally...
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2015-06-04
Nick Clifton
Fixes the check for emulated MSP430 instrucrtions that...
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2015-06-02
Matthew Wahab
[ARM] Add support for ARMv8.1 PAN extension
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2015-06-02
Matthew Wahab
[ARM] Rework CPU feature selection in the disassembler
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2015-06-02
Matthew Wahab
[AArch64] Support for ARMv8.1a Adv.SIMD instructions
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2015-06-02
Matthew Wahab
[AArch64] Support for ARMv8.1a Limited Ordering Regions...
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2015-06-01
Matthew Wahab
[AArch64][libopcode] Add support for PAN architecture...
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2015-06-01
Jan Beulich
x86/Intel: fix i386_optab[] for vcvt{,u}si2s{d,s}
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2015-06-01
Jan Beulich
x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct...
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2015-06-01
Jan Beulich
x86/Intel: accept mandated operand order for vcvt{...
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2015-05-18
H.J. Lu
Remove Disp32 from AMD64 direct call/jmp
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2015-05-15
H.J. Lu
Support AMD64/Intel ISAs in assembler/disassembler
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2015-05-15
Peter Bergner
Fix some PPC assembler errors.
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2015-05-13
H.J. Lu
Add missing ChangeLog entries for PR binutis/18386
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2015-05-11
H.J. Lu
Remove Disp16|Disp32 from 64-bit direct branches
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2015-05-11
H.J. Lu
Add Intel MCU support to opcodes
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2015-04-30
DJ Delorie
Make RL78 disassembler and simulator respect ISA for...
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2015-04-29
Nick Clifton
Updated translations for various binutils components.
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2015-04-27
Peter Bergner
opcodes/
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2015-04-27
Andreas Krebbel
S/390: Fixes for z13 instructions.
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2015-04-23
Jan Beulich
x86: disambiguate disassembly of certain AVX512 insns
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2015-04-15
H.J. Lu
Remove the unused PREFIX_UD_XXX
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2015-04-15
H.J. Lu
Check dp->prefix_requirement instead
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2015-04-15
H.J. Lu
Handle invalid prefixes for rdrand and rdseed
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2015-04-15
H.J. Lu
Replace mandatory_prefix with prefix_requirement
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2015-04-15
Renlin Li
[ARM] Disassembles SSAT and SSAT16 instructions incorre...
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projects / deliverable / binutils-gdb.git / history
Matthew Wahab
Alan Modra
H.J. Lu
DJ Delorie
Claudiu Zissulescu
Andre Vieira
Tristan Gingold
Nick Clifton
Peter Bergner
Yao Qi
Vinay Kumar
Andreas Krebbel
Dominik Vogt
Tom Rix
Anton Blanchard
Jose E. Marchesi
Jan Stancek
Alexander Fomin
Andre Vieira
Simon Dardis
Robert Suchanek
Amit Pawar
Alessandro Marzocchi
Sandra Loosemore
Szabolcs Nagy
Jan Beulich
Renlin Li