[AArch64, Binutils] Make hint space instructions valid for Armv8-a
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
2020-04-20  Sudakshina Das[AArch64, Binutils] Make hint space instructions valid...
2020-04-17  Fredrik Strupe[PATCH v2] binutils: arm: Fix disassembly of conditiona...
2020-04-16  David Faustcpu,gas,opcodes: support for eBPF JMP32 instruction...
2020-04-07  Cui,LiliAdd support for intel TSXLDTRK instructions$
2020-04-02  LiliCuiAdd support for intel SERIALIZE instruction
2020-03-26  Alan ModraRe: H8300 use of uninitialised value
2020-03-26  Alan ModraRe: ARC: Use of uninitialised value
2020-03-24  Alan ModraUninitialised memory read in z80-dis.c
2020-03-22  Alan ModraH8300 use of uninitialised value
2020-03-22  Alan ModraARC: Use of uninitialised value
2020-03-22  Alan ModraNS32K arg_bufs uninitialised
2020-03-22  Alan Modras12z disassembler tidy
2020-03-20  Alan Modrametag uninitialized memory read
2020-03-20  Alan ModraNDS32 disassembly of odd sized sections
2020-03-20  Alan ModraPowerPC disassembly of odd sized sections
2020-03-17  Nick CliftonReplace a couple of assertions in the BFD library that...
2020-03-13  Jan Beulichx86-64: correct mis-named X86_64_0D enumerator
2020-03-09  H.J. Lux86: Also pass -P to $(CPP) when processing i386-opc.tbl
2020-03-09  Jan Beulichx86: use template for AVX512 integer comparison insns
2020-03-09  Jan Beulichx86: use template for XOP integer comparison, shift...
2020-03-09  Jan Beulichx86: use template for AVX/AVX512 floating point compari...
2020-03-09  Jan Beulichx86: use template for SSE floating point comparison...
2020-03-09  Jan Beulichx86: allow opcode templates to be templated
2020-03-06  Jan Beulichx86: reduce amount of various VCVT* templates
2020-03-06  Jan Beulichx86: drop/replace IgnoreSize
2020-03-06  Jan Beulichx86: don't accept FI{LD,STP,STTP}LL in Intel syntax...
2020-03-06  Jan Beulichx86: replace NoRex64 on VEX-encoded insns
2020-03-06  Jan Beulichx86: drop Rex64 attribute
2020-03-06  Jan Beulichx86: correct MPX insn w/o base or index encoding in...
2020-03-06  Jan Beulichx86: add missing IgnoreSize
2020-03-06  Jan Beulichx86: refine TPAUSE and UMWAIT
2020-03-04  Jan Beulichx86: support VMGEXIT
2020-03-03  H.J. Lux86: Replace IgnoreSize/DefaultSize with MnemonicSize
2020-03-03  Sergey BelyashovThe patch fixed invalid compilation of instruction...
2020-03-03  H.J. Lux86: Allow integer conversion without suffix in AT...
2020-02-26  Alan ModraIndent labels
2020-02-25  Claudiu Zissulescu[ARC][committed] Update int_vector_base aux register.
2020-02-21  Nelson ChuRISC-V: Support the ISA-dependent CSR checking.
2020-02-19  Jim WilsonRISC-V: Convert the ADD/ADDI to the compressed MV/LI...
2020-02-17  H.J. Lux86: Remove CpuABM and add CpuPOPCNT
2020-02-17  Jan Beulichx86: fold certain VCVT{,U}SI2S{S,D} templates
2020-02-17  Jan Beulichx86: fold AddrPrefixOpReg templates
2020-02-17  Jan Beulichx86/Intel: improve diagnostics for ambiguous VCVT*...
2020-02-17  H.J. Lux86: Don't disable SSE3 when disabling SSE4a
2020-02-17  Alan ModraRe: x86: Don't disable SSE4a when disabling SSE4
2020-02-16  H.J. Lux86: Don't disable SSE4a when disabling SSE4
2020-02-14  H.J. LuRemove Intel syntax comments on movsx and movzx
2020-02-14  Jan Beulichx86: replace adhoc (partly wrong) ambiguous operand...
2020-02-13  Jan Beulichx86: fix SSE4a dependencies of ".arch .nosse*"
2020-02-12  Jan Beulichx86: correct VFPCLASSP{S,D} operand size handling
2020-02-12  Jan Beulichx86: fold two JMP templates
2020-02-12  Jan Beulichx86-64: Intel64 adjustments for insns dealing with...
2020-02-11  Jan Beulichx86: drop ShortForm attribute
2020-02-11  Jan Beulichx86: drop stray ShortForm attributes
2020-02-11  Alan ModraEnsure *valuep always written by extract_normal return
2020-02-10  Matthew Malcomson[binutils][arm] Implement Custom Datapath Extensions...
2020-02-10  Matthew Malcomson[binutils][arm] arm support for ARMv8.m Custom Datapath...
2020-02-10  H.J. Lux86: Accept Intel64 only instruction by default
2020-02-07  Sergey BelyashovAdd support for the GBZ80 and Z80N variants of the...
2020-02-04  Alan Modraubsan: d30v: negation of -2147483648
2020-02-03  Alan Modraubsan: m32c: left shift of negative value
2020-02-01  Alan Modraubsan: frv: left shift of negative value
2020-01-31  Jan Beulichx86: replace EXxmm_mdq by EXVexWdqScalar
2020-01-31  Jan Beulichx86: drop unused EXVexWdq / vex_w_dq_mode
2020-01-31  Richard Sandifordaarch64: Fix MOVPRFX markup for bf16 conversions
2020-01-30  Alan Modraubsan: m32c: left shift of negative value
2020-01-30  Jose E. Marchesicpu,opcodes,gas: fix neg and neg32 instructions in BPF
2020-01-30  Jan Beulichx86-64: honor vendor specifics for near RET
2020-01-30  Jan Beulichx86: drop further pointless/bogus DefaultSize
2020-01-30  Alan Modraubsan: tic4x: left shift cannot be represented in type...
2020-01-27  H.J. Lux86-64: Properly encode and decode movsxd
2020-01-27  Tamar ChristinaAArch64: Fix cfinv disassembly issues
2020-01-21  Jan Beulichx86: improve handling of insns with ambiguous operand...
2020-01-21  Jan Beulichx86: VCVTNEPS2BF16{X,Y} should permit broadcasting
2020-01-20  Nick CliftonUpdated translations for various binutils sub-directories
2020-01-20  Alan Modraubsan: hppa: negation of -2147483648
2020-01-20  Alan Modraubsan: arm: out of bounds array access
2020-01-18  Nick CliftonUpdate version to 2.34.50. Regenerate configure and...
2020-01-18  Nick CliftonAdd markers for 2.34 branch to the NEWS files and Chang...
2020-01-17  Christian BiesingerFix spelling errors
2020-01-17  H.J. Lux86: Add {vex} pseudo prefix
2020-01-16  Andre Vieira[binutils][arm] PR25376 Change MVE into a CORE_HIGH...
2020-01-16  Jan Beulichx86: drop stale Vec_Imm4 related comment
2020-01-16  Jan Beulichx86: add a few more missing VexWIG
2020-01-16  Jan Beulichx86: VPEXTRQ/VPINSRQ are unavailable outside of 64...
2020-01-15  Alan Modratic4x disassembly static variables
2020-01-14  Sergey BelyashovFix various assembler testsuite failures for the Z80...
2020-01-14  Alan Modraubsan: z8k: left shift cannot be represented in type...
2020-01-13  Thomas TroegerAdd an option to objdump's disassembler to generate...
2020-01-13  Claudiu Zissulescu[ARC][committed] Code cleanup and improvements.
2020-01-13  Claudiu Zissulescu[ARC] [COMMITTED] Change ACCL/ACCH reg name to generic.
2020-01-13  Alan Modraasan: ns32k: wild memory write
2020-01-13  Alan Modraubsan: wasm32: signed integer overflow
2020-01-13  Alan Modrascore formatting
2020-01-13  Alan Modraubsan: score: left shift of negative value
2020-01-13  Alan Modratic4x: sign extension using shifts
2020-01-13  Alan Modraubsan: fr30: left shift of negative value
2020-01-13  Alan Modraubsan: xgate: left shift of negative value
2020-01-10  Alan Modraubsan: tilepro: signed integer overflow
2020-01-10  Alan Modraubsan: m10300: shift exponent -4
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