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RISC-V: Fix disassemble for c.li, c.andi and c.addiw
[deliverable/binutils-gdb.git]
/
opcodes
/
ChangeLog
2017-05-04
Kito Cheng
RISC-V: Fix disassemble for c.li, c.andi and c.addiw
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2017-05-02
Michael Clark
RISC-V: Change CALL macro to use ra as the temporary...
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2017-05-02
Maciej W. Rozycki
MIPS16/opcodes: Keep the LSB of PC-relative offsets...
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2017-05-02
Bernd Edlinger
Fix value in comment of disassembled ARM type A opcodes.
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2017-04-25
Claudiu Zissulescu
[ARC] Enhance enter/leave mnemonics.
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2017-04-25
Claudiu Zissulescu
[ARC] Prefer NOP instead of MOV 0,0
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2017-04-25
Maciej W. Rozycki
MIPS16/opcodes: Add `-M no-aliases' disassembler option...
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2017-04-25
Maciej W. Rozycki
MIPS16/opcodes: Annotate instruction aliases
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2017-04-24
Tamar Christina
Fix snafu in aarch64 opcodes debugging statement.
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2017-04-22
Alan Modra
PowerPC VLE insn set additions
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2017-04-21
Jose E. Marchesi
opcodes: mark SPARC RETT instructions as v6notv9.
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2017-04-21
Nick Clifton
Fix detection of illegal AArch64 opcodes that resemble...
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2017-04-13
Alan Modra
Regen cgen files
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2017-04-10
Alan Modra
Reorder PPC_OPCODE_* and set PPC_OPCODE_TMR for e6500
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2017-04-10
Alan Modra
Bye bye PPC_OPCODE_HTM and -mhtm
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2017-04-10
Alan Modra
Bye Bye PPC_OPCODE_VSX3
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2017-04-10
Alan Modra
Bye bye PPC_OPCODE_ALTIVEC2
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2017-04-10
Alan Modra
Tidy ppc476 opcodes
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2017-04-10
Pip Cet
WebAssembly disassembler support
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2017-04-07
Alan Modra
Remove E6500 insns from PPC_OPCODE_ALTIVEC2
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2017-04-06
Pip Cet
Add support for disassembling WebAssembly opcodes.
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2017-04-05
Pedro Alves
-Wwrite-strings: Constify struct disassemble_info's...
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2017-04-04
Palmer Dabbelt
RISC-V: Resurrect GP-relative disassembly hints
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2017-03-30
Pip Cet
Add support for the WebAssembly file format and the...
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2017-03-29
Jose E. Marchesi
opcodes: sparc: support missing SPARC ASIs from UA2005...
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2017-03-29
Alan Modra
PowerPC -Mraw disassembly
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2017-03-27
Alan Modra
PR21303, objdump doesn't show e200z4 insns
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2017-03-27
Rinat Zelig
Implement ARC NPS-400 Ultra Ip and Miscellaneous instru...
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2017-03-21
Andreas Krebbel
S/390: Remove vx2 facility flag
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2017-03-21
Rinat Zelig
arc/nps400: Add cp16/cp32 instructions to opcodes library
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2017-03-17
Alan Modra
E6500 spr mnemonics
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2017-03-15
Kito Cheng
RISC-V: Fix assembler for c.li, c.andi and c.addiw
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2017-03-15
Kito Cheng
RISC-V: Fix assembler for c.addi, rd can be x0
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2017-03-14
Andrew Waterman
RISC-V: Fix [dis]assembly of srai/srli
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2017-03-09
H.J. Lu
X86: Add pseudo prefixes to control encoding
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2017-03-09
H.J. Lu
Use CpuCET on rdsspq
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2017-03-09
Peter Bergner
Update -maltivec and -mvsx options to only enable their...
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2017-03-08
Peter Bergner
Add support for the new 'lnia' extended mnemonic.
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2017-03-06
H.J. Lu
Add support for Intel CET instructions
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2017-03-06
Alan Modra
Don't decode powerpc insns with invalid fields
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2017-02-28
Peter Bergner
GDB: Add support for the new set/show disassembler...
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2017-02-28
Jan Beulich
x86: fix handling of 64-bit operand size VPCMPESTR...
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2017-02-24
Richard Sandiford
[AArch64] Additional SVE instructions
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2017-02-24
Richard Sandiford
[AArch64] Add a "compnum" feature
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2017-02-24
Jan Beulich
x86: also correctly support TEST opcode aliases
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2017-02-23
Sheldon Lobo
opcodes,gas: associate SPARC ASIs with an architecture...
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2017-02-23
Jan Beulich
x86: drop stray VEX opcode 82 references
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2017-02-22
Jan Beulich
aarch64: actually copy first operand in convert_bfc_to_...
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2017-02-15
Andrew Waterman
Add SFENCE.VMA instruction
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2017-02-15
Richard Sandiford
[AArch64] Add SVE system registers
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2017-02-15
Claudiu Zissulescu
[ARC] Fix assembler relaxation.
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2017-02-15
Vineet Gupta
Distinguish some of the registers different on ARC700...
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2017-02-14
Alan Modra
PowerPC register expression checks
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2017-02-11
Alan Modra
Fix use after free in cgen instruction lookup
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2017-02-10
Nicholas Piggin
POWER9 add scv/rfscv instruction support
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2017-02-03
Nick Clifton
Fix compile time warning messages when compiling binuti...
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2017-01-27
Alexis Deruell
Fix disassembling of TIC6X parallel instructions where...
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2017-01-25
Dimitar Dimitrov
Clarify that include/opcode/ files are part of GNU...
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2017-01-20
Nick Clifton
Updated Irish translation for the opcodes library.
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2017-01-18
Szabolcs Nagy
[ARM] Fix the decoding of indexed element VCMLA instruction
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2017-01-13
Yao Qi
Return -1 on memory error in print_insn_m68k
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2017-01-13
Yao Qi
Remove magic numbers in m68k-dis.c:print_insn_arg
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2017-01-12
Igor Tsimbalist
Enable Intel AVX512_VPOPCNTDQ instructions
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2017-01-12
Yao Qi
Return -1 on memory error in print_insn_msp430
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2017-01-05
Nick Clifton
Prevent an abort in the FRV disassembler if the target...
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2017-01-04
Szabolcs Nagy
[AArch64] Add separate feature flag for weaker release...
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2017-01-03
Kito Cheng
Add support for the Q extension to the RISCV ISA.
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2017-01-03
Dilyan Palauzov
Add fall through comment.
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2017-01-03
Nick Clifton
Add new Serbian translation for the opcodes library.
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2017-01-02
Alan Modra
Regen opcodes cgen files
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2017-01-02
Alan Modra
Update year range in copyright notice of all files.
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2017-01-02
Alan Modra
ChangeLog rotation
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2016-12-31
Alan Modra
Fix riscv breakage
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2016-12-31
Dimitar Dimitrov
PRU Opcode Port
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2016-12-29
Yao Qi
Return 'int' rather than 'unsigned short' in avrdis_opcode
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2016-12-28
Alan Modra
Check bfd support for bfd_mips_elf_get_abiflags in...
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2016-12-23
Maciej W. Rozycki
MIPS16: Add ASMACRO instruction support
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2016-12-23
Maciej W. Rozycki
MIPS16: Simplify extended operand handling
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2016-12-23
Maciej W. Rozycki
MIPS16: Reassign `0' and `4' operand codes
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2016-12-23
Maciej W. Rozycki
MIPS16: Handle non-extensible instructions correctly
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2016-12-23
Maciej W. Rozycki
MIPS16: Remove "extended" BREAK/SDBBP handling
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2016-12-23
Maciej W. Rozycki
MIPS16/GAS: Disallow EXTEND delay-slot scheduling
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2016-12-23
Maciej W. Rozycki
opcodes: Use autoconf to check for `bfd_mips_elf_get_ab...
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2016-12-23
Tristan Gingold
Bump version to 2.28.51
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2016-12-23
Tristan Gingold
Regenerate pot files.
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2016-12-21
Alan Modra
ChangeLog formatting fixes
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2016-12-21
Andrew Waterman
Avoid creating symbol table entries for registers
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2016-12-20
Maciej W. Rozycki
MIPS16/opcodes: Respect ISA and ASE in disassembly
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2016-12-20
Maciej W. Rozycki
MIPS16: Switch to 32-bit opcode table interpretation
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2016-12-20
Maciej W. Rozycki
MIPS16/opcodes: Correct 64-bit macros' ISA membership
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2016-12-20
Maciej W. Rozycki
MIPS16/opcodes: Correct I64/SDRASP opcode's ISA membership
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2016-12-20
Andrew Waterman
Correct assembler mnemonic for RISC-V aqrl AMOs
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2016-12-20
Andrew Waterman
Fix disassembly of RISC-V CSR instructions under -Mno...
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2016-12-20
Andrew Waterman
Add canonical JALR for RISC-V
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2016-12-20
Andrew Waterman
Re-work RISC-V gas flags: now we just support -mabi...
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2016-12-20
Andrew Waterman
Formatting changes for RISC-V
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2016-12-20
Alan Modra
Add opcodes RISC-V dependencies
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2016-12-19
Maciej W. Rozycki
MIPS/opcodes: Only examine ELF file structures if SYMTA...
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2016-12-19
Maciej W. Rozycki
MIPS/opcodes: Only call `bfd_mips_elf_get_abiflags...
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2016-12-16
Nick Clifton
Fix compile time warning building arm-dis.c
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