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Use disassemble_info.private_data in place of insn_sets
[deliverable/binutils-gdb.git]
/
opcodes
/
i386-dis.c
2019-12-04
Jan Beulich
x86/Intel: extend MOVDIRI testing
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2019-11-07
Jan Beulich
x86: support further AMD Zen2 instructions
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2019-11-07
Jan Beulich
x86: adjust register names printed for MONITOR/MWAIT
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2019-11-05
Jan Beulich
x86: fold OP_Mwaitx() into OP_Mwait()
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2019-11-05
Jan Beulich
x86: split MONITORX/MWAITX entries
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2019-11-05
Jan Beulich
x86: consolidate disassembler enum naming a little
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2019-07-01
Jan Beulich
x86: remove ModRM.mod decoding layer from AVX512F VMOVS...
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2019-07-01
Jan Beulich
x86: drop a few dead macros
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2019-06-27
H.J. Lu
i386: Check vector length for scatter/gather prefetch...
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2019-06-27
Jan Beulich
x86: fold AVX scalar to/from int conversion insns
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2019-06-27
Jan Beulich
x86: allow VEX et al encodings in 16-bit (protected...
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2019-06-25
Jan Beulich
x86: drop dqa_mode
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2019-06-25
Jan Beulich
x86: simplify OP_I64()
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2019-06-25
Jan Beulich
x86: fix (dis)assembly of certain SSE2 insns in 16...
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2019-06-21
H.J. Lu
i386: Break i386-dis-evex.h into small files
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2019-06-19
H.J. Lu
i386: Check vector length for EVEX broadcast instructions
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2019-06-17
H.J. Lu
i386: Check vector length for vshufXXX/vinsertXXX/vextr...
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2019-06-05
H.J. Lu
i386: Check vector length for EVEX vextractfXX and...
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2019-06-04
H.J. Lu
i386: Check for reserved VEX.vvvv and EVEX.vvvv
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2019-06-04
H.J. Lu
Enable Intel AVX512_VP2INTERSECT insn
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2019-06-04
H.J. Lu
Add support for Intel ENQCMD[S] instructions
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2019-04-05
Xuepeng Guo
x86: Support Intel AVX512 BF16
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2019-01-01
Alan Modra
Update year range in copyright notice of binutils files
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2018-11-06
Jan Beulich
x86: correctly handle VMOVD with EVEX.W set outside...
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2018-11-06
Jan Beulich
x86: correctly handle KMOVD with VEX.W set outside...
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2018-11-06
Jan Beulich
x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*
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2018-10-05
H.J. Lu
x86: Add Intel ENCLV to assembler and disassembler
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2018-09-17
H.J. Lu
x86: Set EVex=2 on EVEX.128 only vmovd and vmovq
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2018-09-17
H.J. Lu
x86: Set Vex=1 on VEX.128 only vmovd and vmovq
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2018-09-17
H.J. Lu
x86: Update disassembler for VexWIG
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2018-09-15
H.J. Lu
x86: Set Vex=1 on VEX.128 only vmovq
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2018-09-14
H.J. Lu
x86: Handle unsupported static rounding in vcvt[u]si2sd...
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2018-09-14
H.J. Lu
x86: Properly decode EVEX.W in vcvt[u]si2s[sd] in 32...
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2018-09-14
H.J. Lu
i386: Reformat OP_E_memory
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2018-09-13
Jan Beulich
x86-64: bndmk, bndldx, and bndstx don't allow RIP-relat...
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2018-08-14
H.J. Lu
x86-64: Display eiz for address with the addr32 prefix
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2018-05-07
H.J. Lu
Enable Intel MOVDIRI, MOVDIR64B instructions
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2018-04-27
Igor Tsimbalist
Revert "Enable Intel MOVDIRI, MOVDIR64B instructions."
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2018-04-26
Igor Tsimbalist
Enable Intel MOVDIRI, MOVDIR64B instructions.
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2018-04-17
Igor Tsimbalist
Enable Intel CLDEMOTE instruction.
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2018-04-15
H.J. Lu
x86: Allow 32-bit registers for tpause and umwait
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2018-04-11
Igor Tsimbalist
Enable Intel WAITPKG instructions.
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2018-04-04
H.J. Lu
i386: Clear vex instead of vex.evex
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2018-03-28
Jan Beulich
x86: don't show suffixes for to-scalar-int conversion...
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2018-03-22
Jan Beulich
x86: fix swapped operand handling for BNDMOV
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2018-03-08
Jan Beulich
x86/Intel: correct disassembly of fsub*/fdiv*
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2018-01-23
Igor Tsimbalist
Enable Intel PCONFIG instruction.
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2018-01-23
Igor Tsimbalist
Enable Intel WBNOINVD instruction.
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2018-01-03
Alan Modra
Update year range in copyright notice of binutils files
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2017-11-24
Jan Beulich
x86: don't omit disambiguating suffixes from "fi*"
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2017-11-23
Jan Beulich
x86: fix AVX-512 16-bit addressing
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2017-11-23
Jan Beulich
x86: correct UDn
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2017-11-16
Jan Beulich
x86: ignore high register select bit(s) in 32- and...
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2017-11-15
Jan Beulich
x86: use correct register names
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2017-11-15
Jan Beulich
x86: drop VEXI4_Fixup()
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2017-11-14
Jan Beulich
x86: add disassembler support for XOP VPCOM* pseudo-ops
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2017-10-23
Igor Tsimbalist
Enable Intel AVX512_BITALG instructions.
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2017-10-23
Igor Tsimbalist
Enable Intel AVX512_VNNI instructions.
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2017-10-23
Igor Tsimbalist
Enable Intel VPCLMULQDQ instruction.
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2017-10-23
Igor Tsimbalist
Enable Intel VAES instructions.
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2017-10-23
Igor Tsimbalist
Enable Intel GFNI instructions.
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2017-10-23
Igor Tsimbalist
Enable Intel AVX512_VBMI2 instructions.
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2017-09-09
H.J. Lu
x86: Remove restriction on NOTRACK prefix position
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2017-07-18
Yuri Chornovian
Fix spelling typos.
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2017-07-05
Borislav Petkov
X86: Disassemble primary opcode map's group 2 ModRM...
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2017-06-21
H.J. Lu
x86: CET v2.0: Update incssp and setssbsy
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2017-06-21
H.J. Lu
x86: CET v2.0: Rename savessp to saveprevssp
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2017-06-21
H.J. Lu
x86: CET v2.0: Update NOTRACK prefix
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2017-06-15
H.J. Lu
i386-dis: Check valid bnd register
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2017-05-24
Yao Qi
Move print_insn_XXX to an opcodes internal header
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2017-05-22
H.J. Lu
x86: Add NOTRACK prefix support
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2017-03-06
H.J. Lu
Add support for Intel CET instructions
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2017-02-28
Jan Beulich
x86: fix handling of 64-bit operand size VPCMPESTR...
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2017-02-24
Jan Beulich
x86: also correctly support TEST opcode aliases
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2017-02-23
Jan Beulich
x86: drop stray VEX opcode 82 references
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2017-01-12
Igor Tsimbalist
Enable Intel AVX512_VPOPCNTDQ instructions
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2017-01-02
Alan Modra
Update year range in copyright notice of all files.
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2016-12-01
Nick Clifton
Fix abort in x86 disassembler.
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2016-11-28
Amit Pawar
X86: Ignore REX_B bit for 32-bit XOP instructions
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2016-11-09
H.J. Lu
X86: Remove the .s suffix from EVEX vpextrw
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2016-11-08
H.J. Lu
X86: Remove the THREE_BYTE_0F7A entry
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2016-11-07
H.J. Lu
X86: Properly handle bad FPU opcode
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2016-11-03
H.J. Lu
X86: Reuse opcode 0x80 decoder for opcode 0x82
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2016-11-03
H.J. Lu
X86: Decode opcode 0x82 as opcode 0x80 in 32-bit mode
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2016-11-03
H.J. Lu
X86: Rename REG_82 to REG_83
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2016-11-02
Igor Tsimbalist
Enable Intel AVX512_4VNNIW instructions
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2016-10-21
H.J. Lu
X86: Remove pcommit instruction
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2016-10-20
H.J. Lu
Check invalid mask registers
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2016-10-18
H.J. Lu
Check addr32flag instead of sizeflag for rip/eip
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2016-10-18
H.J. Lu
Remove the remaining SSE5 support
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2016-10-05
Alan Modra
-Wimplicit-fallthrough warning fixes
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2016-09-30
H.J. Lu
Don't assign alt twice
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2016-08-24
H.J. Lu
X86: Add ptwrite instruction
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2016-06-03
H.J. Lu
Handle indirect branches for AMD64 and Intel64
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2016-05-10
Alexander Fomin
Enable Intel RDPID instruction.
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2016-04-23
H.J. Lu
Skip if size of bfd_vma is smaller than address size
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2016-02-16
H.J. Lu
Add parentheses to prevent truncated addresses
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2016-01-01
Alan Modra
Copyright update for binutils
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2015-12-09
H.J. Lu
Implement Intel OSPKE instructions
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2015-08-24
Jan Stancek
Fix the partial disassembly of a broken three byte...
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