2021-03-09 |
Jan Beulich | x86: fold some prefix related attributes into a single one |
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2021-03-09 |
Jan Beulich | x86-64: make SYSEXIT handling similar to SYSRET's |
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2021-02-16 |
Jan Beulich | x86: CVTPI2PD has special behavior |
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2021-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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2020-10-20 |
Ganesh Gopalasubra... | Add AMD znver3 processor support |
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2020-10-16 |
Cui,Lili | Enhancement for avx-vnni patch |
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2020-10-14 |
H.J. Lu | x86: Support Intel AVX VNNI |
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2020-10-14 |
Lili Cui | x86: Add support for Intel HRESET instruction |
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2020-10-14 |
Lili Cui | x86: Support Intel UINTR |
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2020-10-14 |
H.J. Lu | x86: Remove the prefix byte from non-VEX/EVEX base_opcode |
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2020-10-14 |
H.J. Lu | x86: Rename VexOpcode to OpcodePrefix |
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2020-09-24 |
Cui,Lili | Add support for Intel TDX instructions. |
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2020-09-23 |
Terry Guo | Enable support to Intel Keylocker instructions |
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2020-07-30 |
H.J. Lu | x86: Add {disp16} pseudo prefix |
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2020-07-10 |
Lili Cui | x86: Add support for Intel AMX instructions |
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2020-07-08 |
Jan Beulich | x86: FMA4 scalar insns ignore VEX.L |
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2020-07-02 |
H.J. Lu | x86: Add SwapSources |
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2020-06-14 |
H.J. Lu | x86: Correct xsusldtrk mnemonic |
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2020-04-07 |
Cui,Lili | Add support for intel TSXLDTRK instructions$ |
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2020-04-02 |
LiliCui | Add support for intel SERIALIZE instruction |
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2020-03-09 |
Jan Beulich | x86: use template for AVX512 integer comparison insns |
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2020-03-09 |
Jan Beulich | x86: use template for XOP integer comparison, shift... |
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2020-03-09 |
Jan Beulich | x86: use template for AVX/AVX512 floating point compari... |
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2020-03-09 |
Jan Beulich | x86: use template for SSE floating point comparison... |
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2020-03-09 |
Jan Beulich | x86: allow opcode templates to be templated |
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2020-03-06 |
Jan Beulich | x86: reduce amount of various VCVT* templates |
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2020-03-06 |
Jan Beulich | x86: drop/replace IgnoreSize |
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2020-03-06 |
Jan Beulich | x86: don't accept FI{LD,STP,STTP}LL in Intel syntax... |
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2020-03-06 |
Jan Beulich | x86: replace NoRex64 on VEX-encoded insns |
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2020-03-06 |
Jan Beulich | x86: drop Rex64 attribute |
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2020-03-06 |
Jan Beulich | x86: add missing IgnoreSize |
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2020-03-06 |
Jan Beulich | x86: refine TPAUSE and UMWAIT |
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2020-03-04 |
Jan Beulich | x86: support VMGEXIT |
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2020-03-03 |
H.J. Lu | x86: Replace IgnoreSize/DefaultSize with MnemonicSize |
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2020-03-03 |
H.J. Lu | x86: Allow integer conversion without suffix in AT... |
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2020-02-17 |
H.J. Lu | x86: Remove CpuABM and add CpuPOPCNT |
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2020-02-17 |
Jan Beulich | x86: fold certain VCVT{,U}SI2S{S,D} templates |
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2020-02-17 |
Jan Beulich | x86: fold AddrPrefixOpReg templates |
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2020-02-17 |
Jan Beulich | x86/Intel: improve diagnostics for ambiguous VCVT*... |
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2020-02-14 |
Jan Beulich | x86: replace adhoc (partly wrong) ambiguous operand... |
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2020-02-12 |
Jan Beulich | x86: correct VFPCLASSP{S,D} operand size handling |
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2020-02-12 |
Jan Beulich | x86: fold two JMP templates |
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2020-02-12 |
Jan Beulich | x86-64: Intel64 adjustments for insns dealing with... |
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2020-02-11 |
Jan Beulich | x86: drop ShortForm attribute |
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2020-02-11 |
Jan Beulich | x86: drop stray ShortForm attributes |
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2020-02-10 |
H.J. Lu | x86: Accept Intel64 only instruction by default |
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2020-01-30 |
Jan Beulich | x86-64: honor vendor specifics for near RET |
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2020-01-30 |
Jan Beulich | x86: drop further pointless/bogus DefaultSize |
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2020-01-27 |
H.J. Lu | x86-64: Properly encode and decode movsxd |
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2020-01-21 |
Jan Beulich | x86: improve handling of insns with ambiguous operand... |
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2020-01-21 |
Jan Beulich | x86: VCVTNEPS2BF16{X,Y} should permit broadcasting |
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2020-01-17 |
H.J. Lu | x86: Add {vex} pseudo prefix |
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2020-01-16 |
Jan Beulich | x86: add a few more missing VexWIG |
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2020-01-16 |
Jan Beulich | x86: VPEXTRQ/VPINSRQ are unavailable outside of 64... |
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2020-01-09 |
Jan Beulich | x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode... |
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2020-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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2019-12-27 |
Jan Beulich | x86: consolidate Disp<NN> handling a little |
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2019-12-04 |
Jan Beulich | x86-64: accept 64-bit LFS/LGS/LSS forms with suffix... |
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2019-12-04 |
Jan Beulich | x86: drop some stray/bogus DefaultSize |
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2019-11-14 |
Jan Beulich | x86: drop redundant SYSCALL/SYSRET templates |
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2019-11-14 |
Jan Beulich | x86: fold individual Jump* attributes into a single... |
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2019-11-14 |
Jan Beulich | x86: make JumpAbsolute an insn attribute |
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2019-11-14 |
Jan Beulich | x86: make AnySize an insn attribute |
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2019-11-12 |
Jan Beulich | x86: fold EsSeg into IsString |
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2019-11-12 |
Jan Beulich | x86: eliminate ImmExt abuse |
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2019-11-12 |
Jan Beulich | x86: introduce operand type "instance" |
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2019-11-08 |
H.J. Lu | i386: Only check suffix in instruction mnemonic |
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2019-11-08 |
Jan Beulich | x86: convert RegMask and RegBND from bitfield to enumerator |
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2019-11-08 |
Jan Beulich | x86: convert RegSIMD and RegMMX from bitfield to enumerator |
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2019-11-08 |
Jan Beulich | x86: convert Control/Debug/Test from bitfield to enumerator |
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2019-11-08 |
Jan Beulich | x86: convert SReg from bitfield to enumerator |
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2019-11-07 |
Jan Beulich | x86: support further AMD Zen2 instructions |
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2019-11-07 |
Jan Beulich | x86/Intel: drop IgnoreSize from operand-less MOVSD... |
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2019-10-30 |
Jan Beulich | x86: slightly rearrange struct insn_template |
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2019-10-30 |
Jan Beulich | x86: drop stray W |
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2019-10-07 |
Jan Beulich | x86/Intel: correct MOVSD and CMPSD handling |
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2019-09-20 |
Jan Beulich | x86-64: fix handling of PUSH/POP of segment register |
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2019-08-07 |
Jan Beulich | x86: drop stray FloatMF |
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2019-07-16 |
Jan Beulich | x86: make RegMem an opcode modifier |
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2019-07-16 |
Jan Beulich | x86: fold SReg{2,3} |
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2019-07-01 |
Jan Beulich | x86: drop Vec_Imm4 |
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2019-07-01 |
Jan Beulich | x86: limit ImmExt abuse |
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2019-07-01 |
Jan Beulich | x86: optimize AND/OR with twice the same register |
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2019-07-01 |
Jan Beulich | x86-64: optimize certain commutative VEX-encoded insns |
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2019-07-01 |
Jan Beulich | x86: optimize EVEX packed integer logical instructions |
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2019-07-01 |
Jan Beulich | x86: add missing pseudo ops for VPCLMULQDQ ISA extension |
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2019-07-01 |
Jan Beulich | x86: drop bogus Disp8MemShift attributes |
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2019-06-25 |
Jan Beulich | x86: fix (dis)assembly of certain SSE2 insns in 16... |
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2019-06-25 |
Jan Beulich | x86-64: also optimize ANDQ with immediate fitting in... |
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2019-06-04 |
H.J. Lu | Enable Intel AVX512_VP2INTERSECT insn |
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2019-06-04 |
H.J. Lu | Add support for Intel ENQCMD[S] instructions |
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2019-05-28 |
H.J. Lu | x86: Add CheckRegSize to AVX512_BF16 instructions with... |
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2019-04-08 |
H.J. Lu | x86: Consolidate AVX512 BF16 entries in i386-opc.tbl |
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2019-04-05 |
Xuepeng Guo | x86: Support Intel AVX512 BF16 |
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2019-03-18 |
H.J. Lu | x86: Optimize EVEX vector load/store instructions |
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2019-01-01 |
Alan Modra | Update year range in copyright notice of binutils files |
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2018-11-06 |
Jan Beulich | x86: adjust {,E}VEX.W handling for PEXTR* / PINSR* |
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2018-11-06 |
Jan Beulich | x86: adjust {,E}VEX.W handling outside of 64-bit mode |
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2018-11-06 |
Jan Beulich | x86: fix various non-LIG templates |
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2018-11-06 |
Jan Beulich | x86: allow {store} to select alternative {,}PEXTRW... |
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