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sim: bfin: fix GPIO logic bugs when processing events
[deliverable/binutils-gdb.git]
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sim
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bfin
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ChangeLog
2011-03-25
Mike Frysinger
sim: bfin: fix GPIO logic bugs when processing events
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2011-03-25
Mike Frysinger
sim: bfin: fix clear/set/toggle GPIO handling
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2011-03-24
Mike Frysinger
sim: bfin: document SIC limitation
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2011-03-24
Mike Frysinger
sim: bfin: fix inverted W1C logic
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2011-03-24
Mike Frysinger
sim: bfin: define more UART LSR bits
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2011-03-24
Mike Frysinger
sim: bfin: fix typo in TWI stat reg
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2011-03-24
Mike Frysinger
sim: bfin: update VIT_MAX behavior to match hardware...
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2011-03-24
Mike Frysinger
sim: bfin: always do 16bit sign extension with the...
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2011-03-24
Mike Frysinger
sim: bfin: update AV and AC ASTAT bits with acc negation
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2011-03-24
Mike Frysinger
sim: bfin: fix thinko in SIC pin encoding
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2011-03-24
Mike Frysinger
sim: bfin: allow byteop[123]p src regs to be the same
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2011-03-24
Mike Frysinger
sim: bfin: fix thinko in bfin_gpio bus addresses
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2011-03-17
Mike Frysinger
sim: bfin: check for kill/pread
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2011-03-15
Mike Frysinger
sim: bfin: add GPIO device simulation
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2011-03-15
Mike Frysinger
sim: bfin: fix brace style
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2011-03-15
Mike Frysinger
sim: bfin: handle AZ updates with 16bit adds/subs
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2011-03-15
Mike Frysinger
sim: bfin: skip acc/ASTAT updates for moves
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2011-03-15
Mike Frysinger
sim: bfin: handle AN (negative overflows) in dsp mult...
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2011-03-15
Mike Frysinger
sim: bfin: handle V overflows in dsp mult insns
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2011-03-15
Mike Frysinger
sim: bfin: decode ASTAT on failure
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2011-03-15
Mike Frysinger
sim: bfin: handle saturation with fract multiplications
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2011-03-14
Mike Frysinger
sim: bfin: forgot to cvs add the changelog
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