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[deliverable/binutils-gdb.git] / sim / mips / mips.igen

1998-04-15	Andrew Cagney	Re-fix 32 bit DSRAV instruction.	blob \| commitdiff \| raw
1998-04-15	Andrew Cagney	Debug tx19 built from igen sources.	blob \| commitdiff \| raw \| diff to current
1998-04-14	Andrew Cagney	Implement 32 bit MIPS16 instructions listed in m16...	blob \| commitdiff \| raw \| diff to current
1998-04-05	Frank Ch. Eigler	* R5900 COP2 function nearly complete. PKE sim now...	blob \| commitdiff \| raw \| diff to current
1998-04-02	Andrew Cagney	For mips get_mem_size call. Force the return of a...	blob \| commitdiff \| raw \| diff to current
1998-04-01	Frank Ch. Eigler	* You bop one on the head ... another one appears.	blob \| commitdiff \| raw \| diff to current
1998-03-27	Frank Ch. Eigler	* Inserted skeleton of R5900 COP2 simulation. Merged...	blob \| commitdiff \| raw \| diff to current
1998-03-25	Tom Tromey	This commit was generated by cvs2svn to track changes...	blob \| commitdiff \| raw \| diff to current
1998-03-03	Andrew Cagney	Fix DIV, DIV1 (wrong check for overflow) and DIVU1...	blob \| commitdiff \| raw \| diff to current
1998-02-25	Andrew Cagney	Finish implementation of r5900 instructions.	blob \| commitdiff \| raw \| diff to current
1998-02-23	Andrew Cagney	sim-main.h: Re-arange r5900 registers so that they...	blob \| commitdiff \| raw \| diff to current
1997-12-11	Jeff Law	* mips.igen (MSUB): Fix to work like MADD.	blob \| commitdiff \| raw \| diff to current
1997-11-11	Andrew Cagney	Make the signess of compares between GPR's explicit...	blob \| commitdiff \| raw \| diff to current
1997-11-11	Andrew Cagney	Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1...	blob \| commitdiff \| raw \| diff to current
1997-11-06	Andrew Cagney	IGEN likes to cache the current instruction address...	blob \| commitdiff \| raw \| diff to current
1997-11-05	Andrew Cagney	Rewrite the MIPS simulator's memory model so that it...	blob \| commitdiff \| raw \| diff to current
1997-10-29	Andrew Cagney	common/sim-bits.h: Document ROTn macro.	blob \| commitdiff \| raw \| diff to current
1997-10-28	Andrew Cagney	Add support for 16 byte quantities to sim-endian macro...	blob \| commitdiff \| raw \| diff to current
1997-10-27	Andrew Cagney	Separate r5900 specifoc and mips16 instructions.	blob \| commitdiff \| raw \| diff to current
1997-10-27	Andrew Cagney	Add mips64vr5400 to configuration list	blob \| commitdiff \| raw \| diff to current
1997-10-24	Andrew Cagney	Checkpoint IGEN version of mips sim	blob \| commitdiff \| raw \| diff to current
1997-10-16	Andrew Cagney	Checkpoint IGEN version of MIPS simulator.	blob \| commitdiff \| raw \| diff to current
1997-10-14	Andrew Cagney	Checkpoint IGEN version of MIPS simulator.	blob \| commitdiff \| raw \| diff to current
1997-10-09	Andrew Cagney	Snap. Gets through igen's checks.	blob \| commitdiff \| raw \| diff to current
1997-10-08	Andrew Cagney	MIPS/IGEN checkpoint - doesn't build.	blob \| commitdiff \| raw \| diff to current

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