Dave Airlie [Thu, 14 Jul 2016 02:14:49 +0000 (12:14 +1000)]
Merge branch 'linux-4.8' of git://github.com/skeggsb/linux into drm-next
Here's an initial drm-next pull for nouveau 4.8, highlights:
- GK20A/GM20B volt and clock improvements.
- Initial support for GP100/GP104 GPUs, GP104 will not yet support
acceleration due to NVIDIA having not released firmware for them as of yet.
* 'linux-4.8' of git://github.com/skeggsb/linux: (97 commits)
drm/nouveau/bus: remove cpu_coherent flag
drm/nouveau/ttm: remove special handling of coherent objects
drm/nouveau: check for supported chipset before booting fbdev off the hw
drm/nouveau/ce/gp104: initial support
drm/nouveau/fifo/gp104: initial support
drm/nouveau/disp/gp104: initial support
drm/nouveau/dma/gp104: initial support
drm/nouveau/ltc/gp104: initial support
drm/nouveau/ibus/gp104: initial support
drm/nouveau/i2c/gp104: initial support
drm/nouveau/gpio/gp104: initial support
drm/nouveau/fuse/gp104: initial support
drm/nouveau/bus/gp104: initial support
drm/nouveau/bar/gp104: initial support
drm/nouveau/mmu/gp104: initial support
drm/nouveau/fb/gp104: initial support
drm/nouveau/imem/gp104: initial support
drm/nouveau/devinit/gp104: initial support
drm/nouveau/bios/gp104: initial support
drm/nouveau/tmr/gp104: initial support
...
Alexandre Courbot [Wed, 13 Jul 2016 06:29:36 +0000 (15:29 +0900)]
drm/nouveau/bus: remove cpu_coherent flag
This flag's only remaining function is to ignore the uncached flag for
BOs on coherent architectures.
However the reason for allocating an object uncache on a non-coherent
architecture (namely because the cost of doing explicit flushes/
invalidations is higher than the benefit of caching the data because
accesses are few and far between) should also apply on architectures for
which coherency is maintained implicitly. Thus allocate coherent objects
as uncached on all architectures.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 13 Jul 2016 06:29:35 +0000 (15:29 +0900)]
drm/nouveau/ttm: remove special handling of coherent objects
TTM-allocated coherent objects were populated using the DMA API and
accessed using the mapping it returned to workaround coherency
issues. These issues seem to have been solved, thus remove this extra
case to handle and use the regular kernel mapping functions.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 12 Jul 2016 01:57:07 +0000 (11:57 +1000)]
drm/nouveau: check for supported chipset before booting fbdev off the hw
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/ce/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/fifo/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/disp/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/dma/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/ltc/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/ibus/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/i2c/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/gpio/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/fuse/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bus/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bar/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/mmu/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/fb/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/imem/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/devinit/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bios/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/tmr/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/pci/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/mc/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/top/gp104: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/core: recognise GP104 chipset
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/sw/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/gr/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/ce/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/fifo/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/disp/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/dma/gp100: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/secboot/gm200: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/ltc/gp100: initial support
Due to the GPU preventing us from touching NV_PLTCG_LTCS_LTSS_CBC_BASE,
we cannot provide CBC/ZBC support without signed PMU firmware to handle
the task for us...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/ibus/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/i2c/gm204: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/gpio/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/fuse/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bus/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bar/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/mmu/gp100: initial support
GP100 still supports the previous generations' page table layout, which
we will temporarily make use of here.
Proper support for the new MMU layout requires some rework to the common
MMU code, which is in progress.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/fb/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/imem/gp100: initial implementation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/devinit/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bios/rammap: 32-bit bios pointers
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bios/pll: initial support for BIT 'C' version 2
Just enough to get at the PLL table.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bios/dp: initial support for 4.2
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/bios/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/tmr/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/pci/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/mc/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/top/gp100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/core: recognise GP100 chipset
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/core: increase maximum nvenc instances to 3
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/core: increase maximum ce instances to 6
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau/fb/gf100-: allow selection of an alternate big page size
GFxxx/GM1xx support the selection of 64/128KiB big pages globally.
GM2xx supports the same, as well as another mode where the page size
can be selected per-instance.
We default to 128KiB pages (With per-instance for GM200, but the current
code selects 128KiB there already) as the MMU code isn't currently able
to handle otherwise.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)]
drm/nouveau: prevent oops if no mmu subdev present
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 27 Jun 2016 06:49:24 +0000 (16:49 +1000)]
drm/nouveau/disp/g94: implement workaround for dvi issue on fx380
Fixes the second DVI output on Quadro FX380.
Thanks to NVIDIA for providing the details on the full workaround.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 22 Jun 2016 02:41:04 +0000 (12:41 +1000)]
drm/nouveau/bios: pointers beyond end of first image need special handling
Makes common the code that was previously used by the PMU table parsing,
as it appears other tables need this too.
Not much of an idea what this is all about...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 22 Jun 2016 02:10:00 +0000 (12:10 +1000)]
drm/nouveau/bios: guard against out-of-bounds accesses to image
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 22 Jun 2016 00:17:11 +0000 (10:17 +1000)]
drm/nouveau/fifo/gk104-: translate engidx into human-readable name in debug output
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 21 Jun 2016 06:29:03 +0000 (16:29 +1000)]
drm/nouveau/disp/nv50-: fix lookup of udisp table under certain circumstances
Some VBIOS have separate tables for each link of a given output path,
which means we have to specify the specific link we're using instead
of all possible links.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Tue, 21 Jun 2016 02:41:36 +0000 (12:41 +1000)]
drm/nouveau/ltc/gm107-: decode interrupt status to human-readable strings
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Julia Lawall [Sun, 19 Jun 2016 06:44:23 +0000 (08:44 +0200)]
drm/nouveau/gr/gk20a: delete unneeded second newline
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Fri, 17 Jun 2016 21:16:14 +0000 (22:16 +0100)]
drm/nouveau/clk/gf100: Read secondary bypass postdiv when required
v2: fix typo it's -> its
Signed-off-by: Roy Spliet <nouveau@spliet.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Roy Spliet [Fri, 17 Jun 2016 21:16:13 +0000 (22:16 +0100)]
drm/nouveau/clk/gf100-: Clean up PLL locking test
Corresponds with GT215. Don't rely on the lock test logic being
unconditionally enabled, and disable test logic when done (presumably
to save power).
v2: Remove warning, nvkm_msec already warns on time-out
Signed-off-by: Roy Spliet <nouveau@spliet.org>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 8 Jun 2016 08:32:41 +0000 (17:32 +0900)]
drm/nouveau/secboot: lazy-load firmware and be more resilient
Defer the loading of firmware files to the chip-specific part of secure
boot. This allows implementations to retry loading firmware if the first
attempt failed ; for the GM200 implementation, this happens when trying
to reset a falcon, typically in reaction to GR init.
Firmware loading may fail for a variety of reasons, such as the
filesystem where they reside not being ready at init time. This new
behavior allows GR to be initialized the next time we try to use it if
the firmware has become available.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 8 Jun 2016 08:32:40 +0000 (17:32 +0900)]
drm/nouveau/secboot/gm200: make firmware loading re-callable
Make it possible to call gm20x_secboot_prepare_blobs() several times
after either success or failure without re-building already existing
blobs. The function will now try to load firmware files that have
previously failed before returning success.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 8 Jun 2016 08:32:39 +0000 (17:32 +0900)]
drm/nouveau/gr/gf100: handle secure boot errors
Handle and propagate secure boot errors. Failure to do so results in
Nouveau incorrectly believing init has succeeded and a completely
black display during boot. If we propagate the error, GR init will fail
and the user will at least have a working display.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 8 Jun 2016 08:32:38 +0000 (17:32 +0900)]
drm/nouveau/secboot: fix kerneldoc for secure boot structures
Some members were documented in the wrong structure.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Karol Herbst [Sun, 17 Apr 2016 12:51:23 +0000 (14:51 +0200)]
drm/nouveau/hwmon: add in_min and in_max
it is a little help for hardware monitoring tools
Signed-off-by: Karol Herbst <karolherbst@gmail.de>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Karol Herbst [Fri, 26 Feb 2016 06:49:08 +0000 (07:49 +0100)]
drm/nouveau/volt: save the voltage range we are able to set
We shouldn't set voltages below the min or above the max voltage the gpu is
able to set, so save the range for future lookups.
Signed-off-by: Karol Herbst <karolherbst@gmail.de>
Reviewed-by: Martin Peres <martin.peres@free.fr>
Tested-by: Pierre Moreau <pierre.morrow@free.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:29 +0000 (17:39 +0900)]
drm/nouveau/clk/gm20b: add glitchless and DFS support
This patch adds support for advanced features supported by the
Noise-Aware PLL of Maxwell. Glitchless switch allows the PL field to be
updated without disabling the PLL first if the SYNC_MODE bit of the CFG
register is set.
More significantly, DFS allows the PLL to monitor the actual input
voltage and to dynamically lower the output frequency accordingly. This
allows the clock to be more tolerant of lower voltages.
These improvements are only supported for Tegra speedos >= 1.
Also add the voltage table that is suitable for GM20B's NAPLL. This
change needs to be done atomically for the right voltages to be used by
the clock driver.
v2. Fix build on non-Tegra platforms
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:28 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: rename constructor
Strip the _ prefix off the gk20a clock constructor.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:27 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: improve MNP programming
Split the MNP programming function into two functions for the cases
where we allow sliding or not, instead of making it take a parameter for
this. This results in less conditionals in the code and makes it easier
to read.
Also make the MNP programming functions take the PLL parameters as
arguments, and move bits of code to more relevant places (previous
programming tended to be just-in-time, which added more conditionnals in
the code).
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:26 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: factorize n_lo computation code
Use a dedicated function instead of always calculating n_lo on the fly.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:25 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: parameterize PLL settings
Make functions manipulating PLL settings take them as an argument,
instead of assuming we want to work on the copy in the gk20a_clk
structure. This makes these functions more flexible, which we will need
in GM20B.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:24 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: add and use MNP programming functions
Add relevant functions to work with the gk20a_pll structure and use them
where they ought to be instead of directly manipulating registers.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:23 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: use nvkm_ functions in slide()
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:22 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: reorganize MNP calculation a bit
Move variables declarations to their actual scope of use, and simplify
code a bit.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:21 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: setup slide once during init
Slide setup needs to be performed only once, during init. Also
use the proper parameters for different clock speeds.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:20 +0000 (17:39 +0900)]
drm/nouveau/clk/gk20a: properly protect macro argument
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:19 +0000 (17:39 +0900)]
drm/nouveau/volt/gm20b: add support for vmin parameter
Chips may be characterized for a minimum voltage. Support this extra
parameter and select the appropriate minimum voltage for the detected
GPU speedo.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:18 +0000 (17:39 +0900)]
drm/nouveau/volt/gk20a: rename constructor
Strip the _ prefix off the gk20a volt constructor.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:17 +0000 (17:39 +0900)]
drm/nouveau/volt/gk20a: constify and name v_scale
Give a name to this constant so we at least get an idea of what it is
for.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:16 +0000 (17:39 +0900)]
drm/nouveau/volt/gk20a: make unused public functions static
Nobody else is using these, so make them private.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Alexandre Courbot [Wed, 1 Jun 2016 08:39:15 +0000 (17:39 +0900)]
drm/nouveau/tegra: fetch gpu_speedo_id
The GPU speedo ID is required to select the right clk/volt parameters on
GM20B.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:57:55 +0000 (08:57 +1000)]
drm/nouveau/secboot: use nvkm_mc_enable/disable()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:56:23 +0000 (08:56 +1000)]
drm/nouveau/secboot: use nvkm_mc_intr_mask/unmask()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:53:06 +0000 (08:53 +1000)]
drm/nouveau/mc/gk104-: add pmu reset mask
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:50:50 +0000 (08:50 +1000)]
drm/nouveau/mc/gf100-: support for masking interrupts
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:48:21 +0000 (08:48 +1000)]
drm/nouveau/mc/gt215: support for masking interrupts
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:39:27 +0000 (08:39 +1000)]
drm/nouveau/mc: support for temporarily masking interrupts from a specific device
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:27:22 +0000 (08:27 +1000)]
drm/nouveau/mc: s/intr_mask/intr_stat/
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:23:41 +0000 (08:23 +1000)]
drm/nouveau/mc: expose device enable/disable separately, as well as reset
There are cases where subdevs need to perform additonal actions around
the master reset, so we want to expost the operations separately.
This commit also adds a flag to the NV_PMC_ENABLE bitfield definitions
which allow skipping the automatic reset() called from core/subdev.c.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 22:17:58 +0000 (08:17 +1000)]
drm/nouveau/mc: take nvkm_device as argument to public functions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Sun, 29 May 2016 23:23:06 +0000 (09:23 +1000)]
drm/nouveau/mc: allow construction of subclassed device
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 30 May 2016 00:36:02 +0000 (10:36 +1000)]
drm/nouveau/top: add function to lookup interrupt mask for a given device
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Mon, 30 May 2016 00:32:55 +0000 (10:32 +1000)]
drm/nouveau/top: take nvkm_device as argument to public functions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Dave Airlie [Fri, 8 Jul 2016 03:42:41 +0000 (13:42 +1000)]
Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next
This is the main 4.8 pull for radeon and amdgpu. Sorry for the delay,
I meant to send this out last week, but I was moving house. Lots of
changes here:
- ATPX improvements for better dGPU power control on PX systems
- New power features for CZ/BR/ST
- Pipelined BO moves and evictions in TTM
- GPU scheduler improvements
- GPU reset improvements
- Overclocking on dGPUs with amdgpu
- Lots of code cleanup
- Bug fixes
* 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux: (191 commits)
drm/amd/powerplay: don't add invalid voltage.
drm/amdgpu: add read/write function for GC CAC programming
drm/amd/powerplay: add definitions related to di/dt feature for fiji and polaris.
drm/amd/powerplay: add shared definitions for di/dt feature.
drm/amdgpu: remove gfx8 registers that vary between asics
drm/amd/powerplay: add mvdd dpm support.
drm/amdgpu: get number of shade engine by cgs interface.
drm/amdgpu: remove more of the ring backup code
drm/amd/powerplay: Unify family defines
drm/amdgpu: clean up ring_backup code, no need more
drm/amdgpu: ib test first after gpu reset
drm/amdgpu: recovery hw jobs when gpu reset V3
drm/amdgpu: abstract amdgpu_vm_is_gpu_reset
drm/amdgpu: add a bool to specify if needing vm flush V2
drm/amdgpu: add amd_sched_job_recovery
drm/amdgpu: force completion for gpu reset
drm/amdgpu: block ttm first before parking scheduler
drm/amd: add amd_sched_hw_job_reset
drm/amd: add parent for sched fence
drm/amdgpu: remove evict vram
...
Dave Airlie [Fri, 8 Jul 2016 03:30:52 +0000 (13:30 +1000)]
Merge tag 'drm-hisilicon-next-2016-07-04' of github.com:xin3liang/linux into drm-next
drm-hisilicon-next
* tag 'drm-hisilicon-next-2016-07-04' of github.com:xin3liang/linux:
drm/hisilicon: Fix ADE vblank on/off handling
drm/hisilicon: add select HISI_KIRIN_DW_DSI
drm/hisilicon: Fix return value check in ade_dts_parse()
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