deliverable/linux.git
8 years agoMerge tag 'imx-drm-next-20160301' of git://git.pengutronix.de/git/pza/linux into...
Dave Airlie [Wed, 2 Mar 2016 07:52:51 +0000 (17:52 +1000)] 
Merge tag 'imx-drm-next-20160301' of git://git.pengutronix.de/git/pza/linux into drm-next

imx-drm vblank IRQ control, fence support, and of endpoint helpers

- Add and make use of drm_of_active_endpoint helpers
- Silence a noisy dev_info into a dev_dbg
- Stop touching primary fb on pageflips
- Track flip state explicitly
- Keep GEM buffer objects referenced while scanout is active
- Implement fence sync by deferring flips to a workqueue for
  dma-bufs with pending fences
- Actually disable vblank IRQs while they are not needed

* tag 'imx-drm-next-20160301' of git://git.pengutronix.de/git/pza/linux:
  drm/imx: only enable vblank IRQs when needed
  drm/imx: implement fence sync
  drm/imx: keep GEM object referenced as long as scanout is active
  drm/imx: track flip state explicitly
  drm/imx: don't touch primary fb on pageflip
  drm/imx: ipuv3 plane: Replace dev_info with dev_dbg if a plane's CRTC changes
  gpu: ipu-v3: ipu-dc: Simplify display controller microcode setup
  drm/rockchip: remove rockchip_drm_encoder_get_mux_id
  drm/imx: remove imx_drm_encoder_get_mux_id
  drm: add drm_of_encoder_active_endpoint helpers

8 years agoMerge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daein...
Dave Airlie [Wed, 2 Mar 2016 07:51:22 +0000 (17:51 +1000)] 
Merge branch 'exynos-drm-next' of git://git./linux/kernel/git/daeinki/drm-exynos into drm-next

   Summary:
   - Add Exynos5420 SoC support to FIMD driver.
     . This patch makes MIC(Mobile Image Compressor) IP to be bypassed in default
       in case of Exynos5420 and later. The Display pipe line configuraion for
       Exynos DRM driver will be considered through of graph concept later.
   - Add Exynos5422 SoC support to MIPI-DSI driver.
     . Exynos5422 SoC is similar to Exynos5433 SoC but software reset is different
       each other so this patch consideres the difference.
   - Get more precise clock divider value of FIMD controller.
     . This patch changes DIV_ROUND_CLOSEST macro to be used instead of DIV_ROUND_UP.
   - Refactor Exynos DRM device and driver registeration.
     . This patch makes Exynos DRM driver to be easy-to-read and at the same time,
       cleans it up by removing #ifdef ~ #endif things.
   - Configure DMA-mapping address space common to Exynos DRM devices in more generic
     without any hacks.
   - some fixups and cleanups.

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (26 commits)
  drm/exynos/dsi: use core helper to create DSI packet
  drm/exynos: use real device for DMA-mapping operations
  drm/exynos: refactor driver and device registration code
  drm/exynos: use arch independent types in uapi header
  drm/exynos: remove platform data structures and include/drm/exynos_drm.h
  drm/exynos/fimc: remove unused camera interface polarization code
  drm/exynos: remove struct exynos_drm_panel_info
  drm/exynos: add exynos5420 support for fimd
  drm/exynos: use DIV_ROUND_CLOSEST to find the closest div
  drm/exynos: remove incorrect ccflags from Makefile
  drm/exynos/decon: make irq handler static
  drm/exynos/hdmi: remove unused variable
  drm/exynos/dsi: constify read only structures
  drm/exynos/dsi: replace registry access macros with functions
  drm/exynos: support exynos5422 mipi-dsi
  drm/exynos/decon: fix disable clocks order
  drm/exynos: fix incorrect cpu address for dma_mmap_attrs()
  drm/exynos: exynos5433_decon: fix wrong state in decon_vblank_enable
  drm/exynos: exynos5433_decon: fix wrong state assignment in decon_enable
  drm/exynos: dsi: restore support for drm bridge
  ...

8 years agodrm/exynos/dsi: use core helper to create DSI packet
Andrzej Hajda [Wed, 17 Feb 2016 13:33:08 +0000 (14:33 +0100)] 
drm/exynos/dsi: use core helper to create DSI packet

Core provides generic helper to create DSI packet, use it instead of
custom code.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: use real device for DMA-mapping operations
Marek Szyprowski [Mon, 29 Feb 2016 08:50:53 +0000 (17:50 +0900)] 
drm/exynos: use real device for DMA-mapping operations

This patch changes device pointer provided to all calls to DMA-mapping
subsystem from the virtual exynos-drm 'device' to the real device pointer
of one of the CRTC devices (decon, fimd or mixer). This way no more hacks
will be needed to configure proper DMA-mapping address space on the common
virtual exynos-drm device. This change also removes the need for some
hacks in IOMMU related code. It also finally solves the problem of Exynos
DRM driver not working on ARM64 architecture, which provides noop-based
DMA-mapping operations for virtual platform devices.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: refactor driver and device registration code
Marek Szyprowski [Thu, 18 Feb 2016 13:34:16 +0000 (14:34 +0100)] 
drm/exynos: refactor driver and device registration code

This patch refactors driver and device registration by moving all drivers
to the common array. This way additional flags can be added later for
new features. #ifdef-based code has been replaced by IS_ENABLED() macro
usage.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: use arch independent types in uapi header
Andrzej Hajda [Fri, 12 Feb 2016 12:13:59 +0000 (13:13 +0100)] 
drm/exynos: use arch independent types in uapi header

User API structs should not use types which size/alignment/padding depends
on architecture. The patch fixes it for all structures except
drm_exynos_g2d_userptr, as g2d related stuff seems to be more complicated
and will be reviewed/adjusted later.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: remove platform data structures and include/drm/exynos_drm.h
Andrzej Hajda [Fri, 12 Feb 2016 12:13:58 +0000 (13:13 +0100)] 
drm/exynos: remove platform data structures and include/drm/exynos_drm.h

Platform data structures are not used for long time so the whole header
file can be safely removed.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos/fimc: remove unused camera interface polarization code
Andrzej Hajda [Fri, 12 Feb 2016 12:13:57 +0000 (13:13 +0100)] 
drm/exynos/fimc: remove unused camera interface polarization code

Polarization was never configured for DRM-FIMC device, so fimc_set_polarity
function did nothing. In fact DRM does not use camera interface so there
is no point in configuring it.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: remove struct exynos_drm_panel_info
Andrzej Hajda [Fri, 12 Feb 2016 12:13:56 +0000 (13:13 +0100)] 
drm/exynos: remove struct exynos_drm_panel_info

struct exynos_drm_panel_info is not used anymore, except exynos_dp,
which can integrate useful fields directly into its context.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: add exynos5420 support for fimd
Chanho Park [Fri, 12 Feb 2016 13:31:39 +0000 (22:31 +0900)] 
drm/exynos: add exynos5420 support for fimd

This patch adds a exynos5420 driver data to support mic_bypass
option to bypass the mic from display out path.
The mic(Mobile image compressor) compresses RGB data from fimd
and send the compressed data to the mipi dsi.
The bypass option can be founded from system register and the bit
is 11. The option bit has been introduced since exynos5420. The
only difference between exynos5250 and exynos5420/exynos5422 is
existence of the bit. Until the MIC is defined and enabled from
device tree, the bypass mic will be default option.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: use DIV_ROUND_CLOSEST to find the closest div
Chanho Park [Thu, 11 Feb 2016 14:11:20 +0000 (23:11 +0900)] 
drm/exynos: use DIV_ROUND_CLOSEST to find the closest div

This patch uses DIV_ROUND_CLOSEST instead of DIV_ROUND_UP
The DIV_ROUND_CLOSEST can be used to find the closest integer
value when we divide some integers.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: remove incorrect ccflags from Makefile
Andrzej Hajda [Wed, 24 Feb 2016 14:15:22 +0000 (15:15 +0100)] 
drm/exynos: remove incorrect ccflags from Makefile

Include directories are provided by core already, adding them in driver
is redundand and causes warnings in case of out-of-tree build.

v2:
    - fixed include in exynos_drm_iommu.c
    - typo in commit message

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos/decon: make irq handler static
Andrzej Hajda [Thu, 11 Feb 2016 11:55:46 +0000 (12:55 +0100)] 
drm/exynos/decon: make irq handler static

The function is used only locally.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos/hdmi: remove unused variable
Andrzej Hajda [Thu, 11 Feb 2016 11:55:45 +0000 (12:55 +0100)] 
drm/exynos/hdmi: remove unused variable

The variable is unused for long time.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos/dsi: constify read only structures
Andrzej Hajda [Thu, 11 Feb 2016 11:55:44 +0000 (12:55 +0100)] 
drm/exynos/dsi: constify read only structures

All global variables are read only.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos/dsi: replace registry access macros with functions
Andrzej Hajda [Thu, 11 Feb 2016 11:55:43 +0000 (12:55 +0100)] 
drm/exynos/dsi: replace registry access macros with functions

Functions are preferred over macros as more type-safe.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: support exynos5422 mipi-dsi
Chanho Park [Sat, 30 Jan 2016 14:11:50 +0000 (23:11 +0900)] 
drm/exynos: support exynos5422 mipi-dsi

This patch supports mipi dsi for exynos5422. The dsi register
offsets of the exynos5422 are similar with exynos5433. However,
the values of the registers are quite different from the
exynos5433. For example, the exynos5422 uses sw reset like
previous chips.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos/decon: fix disable clocks order
Andrzej Hajda [Thu, 11 Feb 2016 11:25:04 +0000 (12:25 +0100)] 
drm/exynos/decon: fix disable clocks order

Decon requires that clocks should be disabled in reverse order. Otherwise
system hangs.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: fix incorrect cpu address for dma_mmap_attrs()
Marek Szyprowski [Thu, 11 Feb 2016 11:32:07 +0000 (12:32 +0100)] 
drm/exynos: fix incorrect cpu address for dma_mmap_attrs()

dma_mmap_attrs() should be called with cpu address returned by
dma_alloc_attrs(). Existing code however passed pages array base as cpu
address. This worked only by a pure luck on ARM architecture. This patch
fixes this issue.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: exynos5433_decon: fix wrong state in decon_vblank_enable
Marek Szyprowski [Wed, 3 Feb 2016 12:42:54 +0000 (13:42 +0100)] 
drm/exynos: exynos5433_decon: fix wrong state in decon_vblank_enable

BIT_IRQS_ENABLED was never set because of incorrect test in
decon_vlank_enable() function, what resulted in lack of enabling vblank
support. This patch fixes this issue.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: exynos5433_decon: fix wrong state assignment in decon_enable
Marek Szyprowski [Wed, 3 Feb 2016 12:42:53 +0000 (13:42 +0100)] 
drm/exynos: exynos5433_decon: fix wrong state assignment in decon_enable

Patch ebf3fd403b79ba6561bd1a4bb5a7cacc99da08e5 ("drm/exynos: add
pm_runtime to DECON 5433") removed some code from decon_enable()
function, but it left set_bit(BIT_SUSPENDED, &ctx->flags) call, which
was earlier called only in error path. This patch removes it, what
finally lets driver to go out of suspended state.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: dsi: restore support for drm bridge
Marek Szyprowski [Wed, 3 Feb 2016 12:42:51 +0000 (13:42 +0100)] 
drm/exynos: dsi: restore support for drm bridge

This patch fixes issue introduced by commit
cf67cc9a29ac19c98bc4fa0e6d14b0c1f592d322 ("drm/exynos: remove struct
exynos_drm_display"), which removed assigning of drm bridge to drm
encoder. Lack of it caused that no bridge callbacks were called on
encoder enable/disable actions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: mic: make all functions static
Marek Szyprowski [Wed, 3 Feb 2016 12:42:50 +0000 (13:42 +0100)] 
drm/exynos: mic: make all functions static

There is no point exposing all internal functions to global kernel name
space, so make all internals functions static.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: mic: convert to component framework
Marek Szyprowski [Wed, 3 Feb 2016 12:42:49 +0000 (13:42 +0100)] 
drm/exynos: mic: convert to component framework

MIC is SoC component and important part of kms pipeline on Exynos5433,
so convert it to use component framework like other KMS/CRTC drivers.
MIC driver is already listed on KMS component driver list in Exynos DRM
core, so without this conversion, initialization of Exynos DRM core
fails on Exynos 5433 SoC.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: mic: use devm_clk interface
Marek Szyprowski [Wed, 3 Feb 2016 12:42:48 +0000 (13:42 +0100)] 
drm/exynos: mic: use devm_clk interface

Drivers should use devm_clk* interface instead of of_clk* functions.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: fix types for compilation on 64bit architectures
Marek Szyprowski [Wed, 3 Feb 2016 12:42:47 +0000 (13:42 +0100)] 
drm/exynos: fix types for compilation on 64bit architectures

This patch fixes compilation warnings (on 64bit architectures) and bugs
related to casting pointers through 32bit integers.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: ipp: fix incorrect format specifiers in debug messages
Marek Szyprowski [Wed, 3 Feb 2016 12:42:46 +0000 (13:42 +0100)] 
drm/exynos: ipp: fix incorrect format specifiers in debug messages

Drivers should use %p for printing pointers instead of hardcoding them
as hexadecimal integers. This patch fixes compilation warnings on 64bit
architectures.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/exynos: depend on ARCH_EXYNOS for DRM_EXYNOS
Joonyoung Shim [Wed, 3 Feb 2016 12:42:45 +0000 (13:42 +0100)] 
drm/exynos: depend on ARCH_EXYNOS for DRM_EXYNOS

Because PLAT_SAMSUNG isn't include exynos SoCs for arm64, but
ARCH_EXYNOS can do it. And it also needs to add ARCH_S3C64XX instead of
PLAT_SAMSUNG.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
8 years agodrm/imx: only enable vblank IRQs when needed
Lucas Stach [Tue, 9 Feb 2016 10:43:08 +0000 (11:43 +0100)] 
drm/imx: only enable vblank IRQs when needed

The vblank IRQ is only needed to trigger page flip work, so we
might as well disable it when there is no work to do.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agodrm/imx: implement fence sync
Lucas Stach [Tue, 9 Feb 2016 13:51:26 +0000 (14:51 +0100)] 
drm/imx: implement fence sync

If the FB is backed by a GEM object with an dma-buf attached
we need to wait for any pending fences to signal before executing
the page flip.

The implementation is straight forward by deferring the flip to
a workqueue in that case.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agodrm/imx: keep GEM object referenced as long as scanout is active
Lucas Stach [Tue, 9 Feb 2016 13:29:49 +0000 (14:29 +0100)] 
drm/imx: keep GEM object referenced as long as scanout is active

The DRM core only references the currently queued/active framebuffer.
So there is a period of time where the flip is not completed, but
the GEM object backing the FB is already unreferenced and could be
destroyed if userspace closes its handle.

Make sure to keep a reference to the GEM object until the flip is
actually executed clean things up in a worker running behind the
flip execution.

Also move the page flip event into the context of this worker, so
it gets cleaned up automatically.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agodrm/imx: track flip state explicitly
Lucas Stach [Thu, 4 Feb 2016 09:15:10 +0000 (10:15 +0100)] 
drm/imx: track flip state explicitly

Start tracking the flip state explicitly, as opposed to inferring
it from the presence if a new FB. This is a preparatory step to
introduce an new immediate state, where we can wait for a fence to
signal.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agodrm/imx: don't touch primary fb on pageflip
Lucas Stach [Tue, 9 Feb 2016 11:38:36 +0000 (12:38 +0100)] 
drm/imx: don't touch primary fb on pageflip

The core already does the correct replacemet if the driver
page flip function returns without an error, so there is no
need to do it here.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agodrm/imx: ipuv3 plane: Replace dev_info with dev_dbg if a plane's CRTC changes
Liu Ying [Fri, 20 Nov 2015 08:14:11 +0000 (16:14 +0800)] 
drm/imx: ipuv3 plane: Replace dev_info with dev_dbg if a plane's CRTC changes

This patch changes the dev_info() call to dev_dbg() in ipu_plane_update()
to print out the information that a plane's CRTC is changed, because this
kind of information is only useful for debugging.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agogpu: ipu-v3: ipu-dc: Simplify display controller microcode setup
Philipp Zabel [Tue, 17 Sep 2013 13:48:46 +0000 (15:48 +0200)] 
gpu: ipu-v3: ipu-dc: Simplify display controller microcode setup

This cleans up the display controller microcode setup in ipu_dc_init_sync
a little bit. The microcode template words for DI0 and DI1 are properly
separated to avoid a clash when DI1 is active in interlaced mode at the
same time as DI0 in non-interlaced mode.
A comment is added to explain the meaning of the sync counter.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agodrm/rockchip: remove rockchip_drm_encoder_get_mux_id
Philipp Zabel [Tue, 24 Feb 2015 10:42:08 +0000 (11:42 +0100)] 
drm/rockchip: remove rockchip_drm_encoder_get_mux_id

It is replaced by drm_of_encoder_active_endpoint_id.

Suggested-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Yakir Yang <ykk@rock-chips.com>
[for dw_hdmi-rockchip]
Acked-by: Mark Yao <mark.yao@rock-chips.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agodrm/imx: remove imx_drm_encoder_get_mux_id
Philipp Zabel [Tue, 24 Feb 2015 10:41:28 +0000 (11:41 +0100)] 
drm/imx: remove imx_drm_encoder_get_mux_id

It is replaced by drm_of_encoder_active_port_id.

Suggested-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
8 years agoMerge tag 'drm-intel-next-2016-02-14' of git://anongit.freedesktop.org/drm-intel...
Dave Airlie [Tue, 1 Mar 2016 03:06:44 +0000 (13:06 +1000)] 
Merge tag 'drm-intel-next-2016-02-14' of git://anongit.freedesktop.org/drm-intel into drm-next

- lots and lots of fbc work from Paulo
- max pixel clock checks from Mika Kahola
- prep work for nv12 offset handling from Ville
- piles of small fixes and refactorings all around

* tag 'drm-intel-next-2016-02-14' of git://anongit.freedesktop.org/drm-intel: (113 commits)
  drm/i915: Update DRIVER_DATE to 20160214
  drm/i915: edp resume/On time optimization.
  agp/intel-gtt: Only register fake agp driver for gen1
  drm/i915: TV pixel clock check
  drm/i915: CRT pixel clock check
  drm/i915: SDVO pixel clock check
  drm/i915: DisplayPort-MST pixel clock check
  drm/i915: HDMI pixel clock check
  drm/i915: DisplayPort pixel clock check
  drm/i915: check that rpm ref is held when accessing ringbuf in stolen mem
  drm/i915: fix error path in intel_setup_gmbus()
  drm/i915: Stop depending upon CONFIG_AGP_INTEL
  agp/intel-gtt: Don't leak the scratch page
  drm/i915: Capture PCI revision and subsytem details in error state
  drm/i915: fix context/engine cleanup order
  drm/i915: Handle PipeC fused off on IVB/HSW/BDW
  drm/i915/skl: Fix typo in DPLL_CFGCR1 definition
  drm/i915: Skip DDI PLL selection for DSI
  drm/i915/skl: Explicitly check for eDP in skl_ddi_pll_select()
  drm/i915/skl: Don't skip mst encoders in skl_ddi_pll_select()
  ...

8 years agoMerge tag 'drm-amdkfd-next-2016-02-27' of git://people.freedesktop.org/~gabbayo/linux...
Dave Airlie [Tue, 1 Mar 2016 02:33:33 +0000 (12:33 +1000)] 
Merge tag 'drm-amdkfd-next-2016-02-27' of git://people.freedesktop.org/~gabbayo/linux into drm-next

Here are a few amdkfd patches for 4.6.
These patches defer radeon/amdgpu loading in case amdkfd is not yet loaded,
by returning -EPROBE_DEFER during their probing stage.

* tag 'drm-amdkfd-next-2016-02-27' of git://people.freedesktop.org/~gabbayo/linux:
  drm/amdgpu: Return -EPROBE_DEFER when amdkfd not loaded
  drm/radeon: Return -EPROBE_DEFER when amdkfd not loaded
  drm/amdkfd: Track when module's init is complete

8 years agodrm/msm/hdmi: HDMI 8996 PHY/PLL support
Archit Taneja [Thu, 25 Feb 2016 05:52:44 +0000 (11:22 +0530)] 
drm/msm/hdmi: HDMI 8996 PHY/PLL support

Add support for the HDMI PHY/PLL found in MSM8996/APQ8096.

Unlike the previous PHYs supported in the driver, this doesn't need
the powerup/powerdown ops. The PLL prepare/unprepare clock ops
enable/disable the phy itself.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/msm/hdmi: Update generated headers for HDMI 8996 PHY
Archit Taneja [Thu, 25 Feb 2016 05:52:43 +0000 (11:22 +0530)] 
drm/msm/hdmi: Update generated headers for HDMI 8996 PHY

Adds HDMI 8996 PHY offsets. The offsets are divided into 3 parts:
- Core HDMI PHY registers
- HDMI PLL registers (part of QSERDES block)
- HDMI TX lane registers (part of QSERDES block)

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/msm/hdmi: Update generated headers to split PHY/PLL offsets
Archit Taneja [Thu, 25 Feb 2016 05:52:42 +0000 (11:22 +0530)] 
drm/msm/hdmi: Update generated headers to split PHY/PLL offsets

- Create separate domains for 8960 PHY and PLL
- Create separate domains for 8x60 PHY

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/msm/hdmi: Convert PHY files according to new design
Archit Taneja [Thu, 25 Feb 2016 05:52:41 +0000 (11:22 +0530)] 
drm/msm/hdmi: Convert PHY files according to new design

Remove the old PHY ops managed by hdmi_platform_config and use them as ops
provided by the HDMI PHY driver.

Remove the old HDMI 8960 PLL code that used the top level HDMI TX mmio
base.

NOTE: With this commit, HDMI functionality will break until the HDMI
PHY/PLL register offsets in hdmi.xml.h aren't updated to be used as
separate domains.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/msm/hdmi: Make HDMI core get its PHY
Archit Taneja [Thu, 25 Feb 2016 05:52:40 +0000 (11:22 +0530)] 
drm/msm/hdmi: Make HDMI core get its PHY

Make HDMI core get its PHY by parsing the "phys" phandle. The core will use
this PHY reference to enable/disable PHY. The driver defers probe until PHY
isn't available.

The DT bindings used here is the same as the one used for PHYs using the
common PHY framework bindings.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/msm/hdmi: Manage HDMI PLL through PHY driver
Archit Taneja [Thu, 25 Feb 2016 05:52:39 +0000 (11:22 +0530)] 
drm/msm/hdmi: Manage HDMI PLL through PHY driver

Add a helper to initialize PLL in the PHY driver. HDMI PLLs are going to
have their own mmio base different from that of PHY.

For the clock code in hdmi_phy_8960.c, some changes were needed for it to
work with the updated register offsets. Create a copy of the updated clock
code in hdmi_pll_8960.c, instead of rewriting it in hdmi_phy_8960.c
itself. This removes the need to place CONFIG_COMMON_CLOCK checks all
around, makes the code more legible, and also removes some old checkpatch
warnings with the original code.

The older hdmi pll clock ops in hdmi_phy_8960.c will be removed later. The
driver will use these until the HDMI PHY/PLL register offsets aren't
considered as separate domains (i.e. their offsets start from 0).

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/msm/hdmi: Create a separate HDMI PHY driver
Archit Taneja [Thu, 25 Feb 2016 05:52:38 +0000 (11:22 +0530)] 
drm/msm/hdmi: Create a separate HDMI PHY driver

Create a PHY device that represents the TX PHY and PLL parts of the HDMI
block.

This makes management of PHY specific resources (regulators and clocks)
much easier, and makes the PHY and PLL usable independently. It also
simplifies the core HDMI driver, which currently assigns phy ops among
many other things.

The PHY driver implementation done here is very similar to the PHY driver
we already have for DSI.

Keep the old hdmi_phy_funcs ops for now. The driver will use these until
the HDMI PHY/PLL register offsets aren't considered as separate
domains (i.e. their offsets start from 0).

The driver doesn't use the common PHY framework for now. This is because
it's hard to map our ops with the ops provided by the framework. The
bindings used for this is the generic phy bindings. So, this can be
adapted to the PHY framework in the future, if possible.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/msm/hdmi: Fix connector detect when there is no HPD gpio
Archit Taneja [Thu, 25 Feb 2016 05:52:37 +0000 (11:22 +0530)] 
drm/msm/hdmi: Fix connector detect when there is no HPD gpio

Some platforms may not have a HPD gpio line to detect Hot Plug signal from
the connector. They need to rely only on reading REG_HDMI_HPD_INT_STATUS
for HPD.

Modify hdmi_connector_detect logic such that it checks for HPD only using
the status register if there is no HPD gpio.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/msm/hdmi: Clean up connector gpio usage
Archit Taneja [Thu, 25 Feb 2016 05:52:36 +0000 (11:22 +0530)] 
drm/msm/hdmi: Clean up connector gpio usage

Make gpio allocation and usage iterative by parsing the gpios on a given
platform from a list. This gives us flexibility over what all gpios exist
for a platform, whether they are input or output, and what value they
should be set to.

In particular, this will make HDMI on 8x96 platforms easier to integrate
with the driver, as it doesn't have a HPD gpio input to them. Also, it
cleans things up a bit.

We still use the legacy gpio api here, as we might need to backport this
driver to downstream kernels.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
8 years agodrm/i915: Update DRIVER_DATE to 20160229
Daniel Vetter [Mon, 29 Feb 2016 08:59:07 +0000 (09:59 +0100)] 
drm/i915: Update DRIVER_DATE to 20160229

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
8 years agodrm/amdgpu: Return -EPROBE_DEFER when amdkfd not loaded
Oded Gabbay [Tue, 9 Feb 2016 11:30:12 +0000 (13:30 +0200)] 
drm/amdgpu: Return -EPROBE_DEFER when amdkfd not loaded

amdgpu must load only after amdkfd's loading has been completed. If that
is not enforced, then amdgpu's call into amdkfd's functions will cause a
kernel BUG.

When amdgpu and amdkfd are built as kernel modules, that rule is enforced
by the kernel's modules loading mechanism. When amdgpu and amdkfd are
built inside the kernel image, that rule is enforced by ordering in the
drm Makefile (amdkfd before amdgpu).

Instead of using drm Makefile ordering, we can now use deferred loading
as amdkfd now returns -EPROBE_DEFER in kgd2kfd_init() when it is not yet
loaded.

This patch defers amdgpu loading by propagating -EPROBE_DEFER to the
kernel's drivers loading infrastructure. That will put amdgpu into the
pending drivers list (see description in dd.c). Once amdkfd is loaded,
a call to kgd2kfd_init() will return successfully and amdgpu will be able
to load.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Return -EPROBE_DEFER when amdkfd not loaded
Oded Gabbay [Tue, 9 Feb 2016 11:30:04 +0000 (13:30 +0200)] 
drm/radeon: Return -EPROBE_DEFER when amdkfd not loaded

radeon must load only after amdkfd's loading has been completed. If that
is not enforced, then radeon's call into amdkfd's functions will cause a
kernel BUG.

When radeon and amdkfd are built as kernel modules, that rule is
enforced by the kernel's modules loading mechanism. When radeon and
amdkfd are built inside the kernel image, that rule is enforced by
ordering in the drm Makefile (amdkfd before radeon).

Instead of using drm Makefile ordering, we can now use deferred
loading as amdkfd now returns -EPROBE_DEFER in kgd2kfd_init() when it is
not yet loaded.

This patch defers radeon loading by propagating -EPROBE_DEFER to the
kernel's drivers loading infrastructure. That will put radeon into the
pending drivers list (see description in dd.c). Once amdkfd is loaded,
a call to kgd2kfd_init() will return successfully and radeon will be
able to load.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdkfd: Track when module's init is complete
Oded Gabbay [Sat, 13 Feb 2016 08:14:07 +0000 (10:14 +0200)] 
drm/amdkfd: Track when module's init is complete

Current dependencies between amdkfd and radeon/amdgpu force the loading
of amdkfd _before_ radeon and/or amdgpu are loaded. When all these kernel
drivers are built as modules, this ordering is enforced by the kernel
built-in mechanism of loading dependent modules.

However, there is no such mechanism in case where all these drivers are
compiled inside the kernel image (not as modules). The current way to
enforce loading of amdkfd before radeon/amdgpu, is to put amdkfd before
radeon/amdgpu in the drm Makefile, but that method is way too fragile.

In addition, there is no kernel mechanism to check whether a kernel
driver that is built inside the kernel image, has already been loaded.

To solve this, this patch adds to kfd_module.c a new static variable,
amdkfd_init_completed, that is set to 1 only when amdkfd's
module initialization function has been completed (successfully).

kgd2kfd_init(), which is the initialization function of the
kgd-->kfd interface, and which is the first function in amdkfd called by
radeon/amdgpu, will return successfully only if amdkfd_init_completed is
equal 1.

If amdkfd_init_completed is not equal to 1, kgd2kfd_init() will
return -EPROBE_DEFER to signal radeon/amdgpu they need to defer
their loading until amdkfd is loaded.

Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/i915: Execlists cannot pin a context without the object
Chris Wilson [Fri, 26 Feb 2016 11:22:31 +0000 (11:22 +0000)] 
drm/i915: Execlists cannot pin a context without the object

Given that the intel_lr_context_pin cannot succeed without the object,
we cannot reach intel_lr_context_unpin() without first allocating that
object - so we can remove the redundant test.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1456485751-15213-1-git-send-email-tvrtko.ursulin@linux.intel.com
8 years agodrm/i915: Reduce the pointer dance of i915_is_ggtt()
Chris Wilson [Fri, 26 Feb 2016 11:03:20 +0000 (11:03 +0000)] 
drm/i915: Reduce the pointer dance of i915_is_ggtt()

The multiple levels of indirect do nothing but hinder the compiler and
the pointer chasing turns to be quite painful but painless to fix.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1456484600-11477-1-git-send-email-tvrtko.ursulin@linux.intel.com
8 years agodrm/i915: Rename vma->*_list to *_link for consistency
Chris Wilson [Fri, 26 Feb 2016 11:03:19 +0000 (11:03 +0000)] 
drm/i915: Rename vma->*_list to *_link for consistency

Elsewhere we have adopted the convention of using '_link' to denote
elements in the list (and '_list' for the actual list_head itself), and
that the name should indicate which list the link belongs to (and
preferrably not just where the link is being stored).

s/vma_link/obj_link/ (we iterate over obj->vma_list)
s/mm_list/vm_link/ (we iterate over vm->[in]active_list)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
8 years agodrm/i915: Balance assert_rpm_wakelock_held() for !IS_ENABLED(CONFIG_PM)
Chris Wilson [Thu, 25 Feb 2016 21:10:28 +0000 (21:10 +0000)] 
drm/i915: Balance assert_rpm_wakelock_held() for !IS_ENABLED(CONFIG_PM)

commit 09731280028ce03e6a27e1998137f1775a2839f3
Author: Imre Deak <imre.deak@intel.com>
Date:   Wed Feb 17 14:17:42 2016 +0200

    drm/i915: Add helper to get a display power ref if it was already enabled

left the rpm wakelock assertions unbalanced if CONFIG_PM was disabled as
intel_runtime_pm_get_if_in_use() would return true without incrementing
the local bookkeeping required for the assertions.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
CC: Mika Kuoppala <mika.kuoppala@intel.com>
CC: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
CC: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1456434628-22574-1-git-send-email-chris@chris-wilson.co.uk
Reviewed-by: Imre Deak <imre.deak@intel.com>
8 years agodrm/i915/lrc: Only set RS ctx enable in ctx control reg if there is a RS
Michel Thierry [Thu, 25 Feb 2016 09:48:58 +0000 (09:48 +0000)] 
drm/i915/lrc: Only set RS ctx enable in ctx control reg if there is a RS

The driver should only set the "RS context enable" bit in the context
image if we plan to use the resource streamer.

Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1456393738-35608-1-git-send-email-michel.thierry@intel.com
8 years agodrm/i915/gen9: Set value of Indirect Context Offset based on gen version
Michel Thierry [Tue, 23 Feb 2016 10:31:49 +0000 (10:31 +0000)] 
drm/i915/gen9: Set value of Indirect Context Offset based on gen version

The cache line offset for the Indirect CS context (0x21C8) varies from gen
to gen.

v2: Move it into a function (Arun), use MISSING_CASE (Chris)
v3: Rebased (catched by ci bat)

Cc: Arun Siluvery <arun.siluvery@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1456223509-6454-1-git-send-email-michel.thierry@intel.com
8 years agoMerge branch 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu into drm-next
Dave Airlie [Fri, 26 Feb 2016 03:02:57 +0000 (13:02 +1000)] 
Merge branch 'for-next' of git.agner.ch/git/linux-drm-fsl-dcu into drm-next

As previously discussed, this is my first pull request for the DCU DRM
driver along with the change in MAINTAINERS.
https://lkml.org/lkml/2016/1/7/26

The pull contains some code cleanup changes (e.g. removing all error
handling for the regmap calls) and several fixes.

* 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu:
  drm/fsl-dcu: fix register initialization
  drm/fsl-dcu: use mode flags for hsync/vsync polarity
  drm/fsl-dcu: fix alpha blending
  drm/fsl-dcu: mask all interrupts on initialization
  drm/fsl-dcu: handle initialization errors properly
  drm/fsl-dcu: avoid memory leak on errors
  drm/fsl-dcu: remove regmap return value checks
  drm/fsl-dcu: specify volatile registers
  drm: fsl-dcu: Fix no fb check bug
  MAINTAINERS: update for Freescale DCU DRM driver

8 years agodrm/fsl-dcu: fix register initialization
Stefan Agner [Fri, 15 Jan 2016 01:24:29 +0000 (17:24 -0800)] 
drm/fsl-dcu: fix register initialization

The layer enumeration start with 0 (0-15 for LS1021a and 0-63 for
Vybrid) whereas the register enumeration start from 1 (1-10 for
LS1021a and 1-9 for Vybrid). The loop started off from 0 for both
iterations and initialized the number of layers inclusive, which
is one layer too many.

All extensively written registers seem to be unassigned, it seems
that the write to those registers did not do any harm in practice.

Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm/fsl-dcu: use mode flags for hsync/vsync polarity
Stefan Agner [Wed, 18 Nov 2015 03:10:29 +0000 (19:10 -0800)] 
drm/fsl-dcu: use mode flags for hsync/vsync polarity

The current default configuration is as follows:
- Invert VSYNC signal (active LOW)
- Invert HSYNC signal (active LOW)

The mode flags allow to specify the required polarity per
mode. Furthermore, none of the current driver settings is
actually a standard polarity.

This patch applies the current driver default polarities as
explicit flags to the display which has been introduced with
the driver (NEC WQVGA "nec,nl4827hc19-05b"). The driver now
also parses the flags field and applies the configuration
accordingly, by using the following values as standard
polarities: (e.g. when no flags are specified):
- VSYNC signal not inverted (active HIGH)
- HSYNC signal not inverted (active HIGH)

Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm/fsl-dcu: fix alpha blending
Stefan Agner [Wed, 18 Nov 2015 22:47:35 +0000 (14:47 -0800)] 
drm/fsl-dcu: fix alpha blending

Fix alpha blending by enabling alpha blending for the whole frame if
a color mode with alpha channel is selected (DRM_FORMAT_ARGB*). Also
support color modes without alpha channel (DRM_FORMAT_XRGB*) by just
not enabling alpha blending on layer level.

Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm/fsl-dcu: mask all interrupts on initialization
Stefan Agner [Thu, 19 Nov 2015 01:27:04 +0000 (17:27 -0800)] 
drm/fsl-dcu: mask all interrupts on initialization

The state of the interrupt mask register on initialization is
unknown, e.g. U-Boot could already used the DCU. So depending on
the boot loader, the outcome of the interrupt mask register could
be different. A defined state is much more preferable. Also, there
is no value in keeping interrupts enabled which we don't need.
Therefor, mask all interrupts on initialization.

Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm/fsl-dcu: handle initialization errors properly
Stefan Agner [Tue, 17 Nov 2015 00:25:17 +0000 (16:25 -0800)] 
drm/fsl-dcu: handle initialization errors properly

If initialization fails (e.g. due to missing panel node or deferred
probe) make sure to roll-back all operations and return the error
code.

Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm/fsl-dcu: avoid memory leak on errors
Stefan Agner [Mon, 16 Nov 2015 23:43:34 +0000 (15:43 -0800)] 
drm/fsl-dcu: avoid memory leak on errors

Improve error handling during CRTC initialization. Especially avoid
memory leaks in the primary plane initialization error path.

Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm/fsl-dcu: remove regmap return value checks
Stefan Agner [Thu, 19 Nov 2015 00:50:55 +0000 (16:50 -0800)] 
drm/fsl-dcu: remove regmap return value checks

It is not common to do regmap return value checks, especially not
for memory mapped device. We can rule out most error returns since
the conditions are static and we know they are ok (e.g. offset
aligned to register stride). Also without proper error handling
they are not really valuable for the user. Hence remove most of
them.

The check in the interrupt handler is worth keeping since a
volatile register won't be readable in case register caching is
still enabled.

Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm/fsl-dcu: specify volatile registers
Stefan Agner [Wed, 18 Nov 2015 02:05:25 +0000 (18:05 -0800)] 
drm/fsl-dcu: specify volatile registers

Since we are using cached registers, we need to specify volatile
registers explicitly to avoid reading their value from the cache.
This allows to read the correct interrupt status in fsl_dcu_drm_irq
and clear the asserted bits only.

Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm: fsl-dcu: Fix no fb check bug
Meng Yi [Wed, 6 Jan 2016 04:12:05 +0000 (12:12 +0800)] 
drm: fsl-dcu: Fix no fb check bug

For state->fb or state->crtc may be NULL in fsl_dcu_drm_plane_atomic_check
function, if so, return 0.

Signed-off-by: Meng Yi <meng.yi@nxp.com>
Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agoMAINTAINERS: update for Freescale DCU DRM driver
Stefan Agner [Thu, 7 Jan 2016 06:02:46 +0000 (22:02 -0800)] 
MAINTAINERS: update for Freescale DCU DRM driver

Promote myself as new maintainer of the Freescale DCU DRM driver.

Acked-by: Jianwei Wang <jianwei.wang.chn@gmail.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
8 years agodrm/i915: Remove update_sprite_watermarks.
Maarten Lankhorst [Wed, 10 Feb 2016 12:49:39 +0000 (13:49 +0100)] 
drm/i915: Remove update_sprite_watermarks.

Commit 791a32be6eb2 ("drm/i915: Drop intel_update_sprite_watermarks")
removes the use of this variable, but forgot to remove it.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455108583-29227-5-git-send-email-maarten.lankhorst@linux.intel.com
8 years agodrm/tilcdc: Use devm_kzalloc() and devm_kcalloc() for private data
Jyri Sarha [Tue, 23 Feb 2016 10:44:27 +0000 (12:44 +0200)] 
drm/tilcdc: Use devm_kzalloc() and devm_kcalloc() for private data

Use devm_kzalloc() and devm_kcalloc() for private data allocation at
driver load time.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: Initialize crtc->port
Jyri Sarha [Wed, 27 May 2015 08:58:37 +0000 (11:58 +0300)] 
drm/tilcdc: Initialize crtc->port

Initialize port device node pointer in the tilcdc crtc. Fixes "Falling
back to first CRTC" warning from tda998x driver.

The tda998x encoder driver calls drm_of_find_possible_crtcs() to
initialize possible_crtcs of struct drm_encoder. The crtc->port needs
to be initialized for drm_of_find_possible_crtcs() to work.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: Disable sync lost interrupt if it fires on every frame
Jyri Sarha [Fri, 8 Jan 2016 12:33:09 +0000 (14:33 +0200)] 
drm/tilcdc: Disable sync lost interrupt if it fires on every frame

Disable the sync lost interrupt if it fires on every frame for 50
consecutive frames in a row. This is relatively sure sign of the sync
lost interrupt being stuck and firing on every frame even if the
display otherwise appears to work OK.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: Add prints on sync lost and FIFO underrun interrupts
Jyri Sarha [Fri, 18 Dec 2015 11:07:52 +0000 (13:07 +0200)] 
drm/tilcdc: Add prints on sync lost and FIFO underrun interrupts

Add ratelimited prints on sync lost and FIFO underrun interrupts.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: Remove the duplicate LCDC_INT_ENABLE_SET_REG in registers[]
Jyri Sarha [Fri, 8 Jan 2016 10:17:50 +0000 (12:17 +0200)] 
drm/tilcdc: Remove the duplicate LCDC_INT_ENABLE_SET_REG in registers[]

Removes the duplicate LCDC_INT_ENABLE_SET_REG-entry in registers array.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: Fix interrupt enable/disable code for version 2 tilcdc
Jyri Sarha [Wed, 9 Dec 2015 10:16:11 +0000 (12:16 +0200)] 
drm/tilcdc: Fix interrupt enable/disable code for version 2 tilcdc

Fix interrupt enable/disable code for version 2 tilcdc. In version 2
tilcdc there is a separate register for disabling interrupts. Writing
0 to enable registers bits does not have any effect. The interrupt
clear register works the same way, writing 1 to specific bit disables
the interrupt and writing 0 does not have any effect.

The "bug" that is fixed here does not really do any harm since the
interrupts are enabled only once in the power up and disabled before
power down.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: Do not update the next frame buffer close to vertical blank
Tomi Valkeinen [Tue, 3 Nov 2015 10:00:51 +0000 (12:00 +0200)] 
drm/tilcdc: Do not update the next frame buffer close to vertical blank

Do not update the next frame buffer close to vertical blank. This is
to avoid situation when the frame changes between writing of
LCDC_DMA_FB_BASE_ADDR_0_REG and LCDC_DMA_FB_CEILING_ADDR_0_REG.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[Added description to the patch]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
8 years agodrm/tilcdc: Get rid of complex ping-pong mechanism
Tomi Valkeinen [Tue, 20 Oct 2015 06:37:27 +0000 (09:37 +0300)] 
drm/tilcdc: Get rid of complex ping-pong mechanism

Get rid of complex ping-pong mechanism and replace it with simpler
single buffer flipping code.

The LCDC HW appears to be designed mainly static framebuffers in
mind. There are two modes of operation, either static single buffer,
or ping pong double buffering with two static buffers switching back
and forth. Luckily the framebuffer start address is fetched only in
the beginning of the frame and changing the address after that only
takes effect after the next vertical blank. The page flipping code can
simply write the address of the new framebuffer and the page is
flipped automatically after the next vertical blank. Using the ping
pong double buffering makes the flipping code way more complex and it
does not provide any benefit, so it is better to switch to single
buffer operation.

There is still one problem in updating the framebuffer dma address on
the fly. There are two registers defining the framebuffer dma area and
things may break if the dma address is fetched in while the registers
are are being updated.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[Added description to the patch]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
8 years agodrm/tilcdc: cleanup irq handling
Tomi Valkeinen [Tue, 20 Oct 2015 09:08:03 +0000 (12:08 +0300)] 
drm/tilcdc: cleanup irq handling

Cleanup irq handling. Clear the irq status unconditionally and
restructure the status bit conditions.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[Added description to the patch]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
8 years agodrm/tilcdc: remove broken error handling
Tomi Valkeinen [Tue, 20 Oct 2015 09:04:05 +0000 (12:04 +0300)] 
drm/tilcdc: remove broken error handling

Remove broken error handling. The condition for handling the
LCDC_SYNC_LOST and LCDC_FIFO_UNDERFLOW could never be satisfied as the
LCDC_SYNC_LOST interrupt is not enabled. Also the requirement to have
both LCDC_SYNC_LOST and LCDC_FIFO_UNDERFLOW fired at once before
handling the error looks weird.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[Added description to the patch]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
8 years agodrm/tilcdc: split reset to a separate function
Tomi Valkeinen [Tue, 20 Oct 2015 06:37:27 +0000 (09:37 +0300)] 
drm/tilcdc: split reset to a separate function

Split reset to a separate function and use usleep_range(250, 1000)
instead of msleep(1) to to keep the reset bit on long enough.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[Added description to the patch, changed mdelay(500) to usleep_range(250, 1000)]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
8 years agodrm/tilcdc: disable crtc on unload
Tomi Valkeinen [Mon, 19 Oct 2015 11:15:26 +0000 (14:15 +0300)] 
drm/tilcdc: disable crtc on unload

Disable crtc on unload. Call tilcdc_crtc_dpms() with DRM_MODE_DPMS_OFF
in the beginning of unload function.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[Added description to the patch]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
8 years agodrm/tilcdc: cleanup runtime PM handling
Tomi Valkeinen [Mon, 19 Oct 2015 09:30:03 +0000 (12:30 +0300)] 
drm/tilcdc: cleanup runtime PM handling

Cleanup runtime PM handling. Before the patch the usage of pm_runtime
calls was inconsistent and hard to follow. After the update the
pm_runtime calls are removed from set_scanout() and called around
major operations that access the HW. After the patch the DPMS code does
not have pm_runtime_forbid/allow calls any more and
pm_runtime_irq_safe() is not set anymore.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
[Added description to the patch]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
8 years agodrm/tilcdc: Allocate register storage based on the actual number registers
Jyri Sarha [Thu, 2 Jul 2015 13:26:12 +0000 (16:26 +0300)] 
drm/tilcdc: Allocate register storage based on the actual number registers

Allocate suspend/resume register storage based on the actual number
registers the driver is aware of. The static allocation for register
storage had fallen behind badly.

Reported-by: Michael Bode <michael@bumbleB.de>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: fix build error when !CONFIG_CPU_FREQ
Grygorii Strashko [Wed, 25 Feb 2015 16:19:43 +0000 (18:19 +0200)] 
drm/tilcdc: fix build error when !CONFIG_CPU_FREQ

Fix build error when !CONFIG_CPU_FREQ
drivers/gpu/drm/tilcdc/tilcdc_drv.c: In function 'tilcdc_load':
drivers/gpu/drm/tilcdc/tilcdc_drv.c:327:1: error: label 'fail_put_clk' defined but not used [-Werror=unused-label]
 fail_put_clk:
 ^

Signed-off-by: Grygorii Strashko <Grygorii.Strashko@linaro.org>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: Implement dma-buf support for tilcdc
Jyri Sarha [Tue, 23 Jun 2015 11:31:17 +0000 (14:31 +0300)] 
drm/tilcdc: Implement dma-buf support for tilcdc

There is nothing special about tilcdc HW when the video memory is
concerned. Just using the standard drm helpers for implementation is
enough.

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: disable the lcd controller/dma engine when suspend invoked
Darren Etheridge [Thu, 25 Sep 2014 00:59:32 +0000 (00:59 +0000)] 
drm/tilcdc: disable the lcd controller/dma engine when suspend invoked

The LCD controller must be deactivated and all DMA transactions stopped
when the suspend power state is entered otherwise the PRCM causes the L3
bus to get stuck in transition state.

This commit forces the lcdc to be shut down and waits for all pending DMA
transactions to complete as part of the suspend handler for this driver.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
Tested-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: make frame_done interrupt active at all times
Darren Etheridge [Thu, 25 Sep 2014 00:59:31 +0000 (00:59 +0000)] 
drm/tilcdc: make frame_done interrupt active at all times

The frame_done interrupt was only being enabled when the vsync
interrupts were being enabled by DRM.  However the frame_done is
used to determine if the LCD controller has successfully completed
the raster_enable, raster_disable commands and the vsync interrupts
are not always enabled during these operations.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
Tested-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: fix kernel panic on suspend when no hdmi monitor connected
Darren Etheridge [Fri, 19 Sep 2014 01:42:57 +0000 (01:42 +0000)] 
drm/tilcdc: fix kernel panic on suspend when no hdmi monitor connected

On BeagleBone Black if no HDMI monitor is connected and suspend
is requested a kernel panic will result:

root@am335x-evm:~# echo mem > /sys/power/state
[ 65.548710] PM: Syncing filesystems ... done.
[ 65.631311] Freezing user space processes ... (elapsed 0.006 seconds) done.
[ 65.648619] Freezing remaining freezable tasks ... (elapsed 0.005 seconds) done.
[ 65.833500] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa30e004
[ 65.841692] Internal error: : 1028 [#1] SMP ARM
  <snip>
[ 66.105287] [<c03765f0>] (platform_pm_suspend) from [<c037b6d4>] (dpm_run_callback+0x34/0x70)
[ 66.114370] [<c037b6d4>] (dpm_run_callback) from [<c037ba84>] (__device_suspend+0x10c/0x2f4)
[ 66.123357] [<c037ba84>] (__device_suspend) from [<c037d004>] (dpm_suspend+0x58/0x218)
[ 66.131796] [<c037d004>] (dpm_suspend) from [<c008d948>] (suspend_devices_and_enter+0x9c/0x3c0)
[ 66.141055] [<c008d948>] (suspend_devices_and_enter) from [<c008de7c>] (pm_suspend+0x210/0x24c)
[ 66.150312] [<c008de7c>] (pm_suspend) from [<c008cabc>] (state_store+0x68/0xb8)
[ 66.158103] [<c008cabc>] (state_store) from [<c02e9654>] (kobj_attr_store+0x14/0x20)
[ 66.166355] [<c02e9654>] (kobj_attr_store) from [<c0185c70>] (sysfs_kf_write+0x4c/0x50)
[ 66.174883] [<c0185c70>] (sysfs_kf_write) from [<c018926c>] (kernfs_fop_write+0xb4/0x150)
[ 66.183598] [<c018926c>] (kernfs_fop_write) from [<c0122638>] (vfs_write+0xa8/0x180)
[ 66.191846] [<c0122638>] (vfs_write) from [<c01229f8>] (SyS_write+0x40/0x8c)
[ 66.199365] [<c01229f8>] (SyS_write) from [<c000e580>] (ret_fast_syscall+0x0/0x48)
[ 66.207426] Code: e595c210 e5932000 e59cc000 e08c2002 (e592c000)

This is because the lcdc module is not enabled when no monitor is detected
to save power.  However the suspend handler just blindly tries to save the
lcdc state by copying out the pertinent registers. However module is off
so no good things happen when you try and access it.

This patch only saves off the registers if the module is enabled, and
then only restores the registers on resume if they were saved off during
suspend.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
Tested-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: adopt pinctrl support
Dave Gerlach [Tue, 29 Jul 2014 06:27:58 +0000 (06:27 +0000)] 
drm/tilcdc: adopt pinctrl support

Update tilcdc driver to set the state of the pins to:
- "default on resume
- "sleep" on suspend

By optionally putting the pins into sleep state in the suspend callback
we can accomplish two things.
- minimize current leakage from pins and thus save power,
- prevent the IP from driving pins output in an uncontrolled manner,
which may happen if the power domain drops the domain regulator.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/tilcdc: verify fb pitch
Tomi Valkeinen [Fri, 7 Feb 2014 17:37:07 +0000 (17:37 +0000)] 
drm/tilcdc: verify fb pitch

LCDC hardware does not support fb pitch that is different (i.e. larger)
than the screen size. The driver currently does no checks for this, and
the results of too big pitch are are flickering and lower fps.

This issue easily happens when using libdrm's modetest tool with non-32
bpp modes. As modetest always allocated 4 bytes per pixel, it implies a
bigger pitch for 16 or 24 bpp modes.

This patch adds a check to reject pitches the hardware cannot support.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
8 years agodrm/tilcdc: rewrite pixel clock calculation
Darren Etheridge [Wed, 15 Jan 2014 21:52:36 +0000 (15:52 -0600)] 
drm/tilcdc: rewrite pixel clock calculation

Updating the tilcdc DRM driver code to calculate the LCD controller
pixel clock more accurately. Based on a suggested implementation by
Tomi Valkeinen.

The current code does not work correctly and produces wrong results
with many requested clock rates. It also oddly uses two different
clocks, a display pll clock and a divider clock (child of display
pll), instead of just using the clock coming to the lcdc.

This patch removes the use of the display pll clock, and rewrites the
code to calculate the clock rates. The idea is simply to request a
clock rate of pixelclock*2, as the LCD controller has an internal
divider which we set to 2.

Signed-off-by: Darren Etheridge <detheridge@ti.com>
[Rewrapped description]
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
8 years agodrm/i915: Kill off intel_crtc->atomic.wait_vblank, v6.
Maarten Lankhorst [Wed, 24 Feb 2016 10:24:26 +0000 (11:24 +0100)] 
drm/i915: Kill off intel_crtc->atomic.wait_vblank, v6.

Currently we perform our own wait in post_plane_update,
but the atomic core performs another one in wait_for_vblanks.
This means that 2 vblanks are done when a fb is changed,
which is a bit overkill.

Merge them by creating a helper function that takes a crtc mask
for the planes to wait on.

The broadwell vblank workaround may look gone entirely but this is
not the case. pipe_config->wm_changed is set to true
when any plane is turned on, which forces a vblank wait.

Changes since v1:
- Removing the double vblank wait on broadwell moved to its own commit.
Changes since v2:
- Move out POWER_DOMAIN_MODESET handling to its own commit.
Changes since v3:
- Do not wait for vblank on legacy cursor updates. (Ville)
- Move broadwell vblank workaround comment to page_flip_finished. (Ville)
Changes since v4:
- Compile fix, legacy_cursor_flip -> *_update.
Changes since v5:
- Kill brackets.
- Add WARN_ON when wait_for_vblanks fails.
- Remove extra newlines.
- Split the checks whether vblank is needed to a separate function,
  with comments why a vblank is needed.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/56CD84DA.5030507@linux.intel.com
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
8 years agodrm/i915: Unify power domain handling.
Maarten Lankhorst [Wed, 10 Feb 2016 12:49:37 +0000 (13:49 +0100)] 
drm/i915: Unify power domain handling.

Right now there's separate power domain handling for update_pipe and
modesets. Unify this and only grab POWER_DOMAIN_MODESET once.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455108583-29227-3-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
8 years agodrm/i915: Pass crtc state to modeset_get_crtc_power_domains.
Maarten Lankhorst [Wed, 10 Feb 2016 12:49:36 +0000 (13:49 +0100)] 
drm/i915: Pass crtc state to modeset_get_crtc_power_domains.

Use our newly created encoder_mask to iterate over the encoders.
This makes it possible to get the crtc power domains from the
crtc_state at any time, without any locks or having to look at
the legacy state.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455108583-29227-2-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
8 years agoMerge branch 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev into drm-next
Dave Airlie [Thu, 25 Feb 2016 00:30:59 +0000 (10:30 +1000)] 
Merge branch 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev into drm-next

rcar-du updates.

* 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev: (281 commits)
  drm: rcar-du: Add tri-planar memory formats support
  drm: rcar-du: Add probe deferral debug messages
  drm: rcar-du: lvds: Add R-Car Gen3 support
  drm: rcar-du: lvds: Rename PLLEN bit to PLLON
  drm: rcar-du: lvds: Fix PLL frequency-related configuration
  drm: rcar-du: lvds: Avoid duplication of clock clamp code
  drm: rcar-du: Add R8A7795 device support
  drm: rcar-du: Output the DISP signal on the ODDF pin
  drm: rcar-du: Output the DISP signal on the DISP pin
  drm: rcar-du: Support up to 4 CRTCs
  drm: rcar-du: Drop LVDS double dependency on OF
  drm: rcar-du: Enable compilation on ARM64
  drm: rcar-du: Fix compile warning on 64-bit platforms
  drm: rcar-du: Expose the VSP1 compositor through KMS planes
  drm: rcar-du: Move plane allocator to rcar_du_plane.c
  drm: rcar-du: Restart the DU group when a plane source changes
  drm: rcar-du: Add VSP1 compositor support
  drm: rcar-du: Add VSP1 support to the planes allocator
  drm: rcar-du: Refactor plane setup
  drm: rcar-du: Compute plane DDCR4 register value directly
  ...

8 years agodrm: rcar-du: Add tri-planar memory formats support
Laurent Pinchart [Thu, 12 Nov 2015 00:03:47 +0000 (02:03 +0200)] 
drm: rcar-du: Add tri-planar memory formats support

Those formats are supported on Gen3 only.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
8 years agodrm: rcar-du: Add probe deferral debug messages
Laurent Pinchart [Wed, 21 Oct 2015 22:09:30 +0000 (01:09 +0300)] 
drm: rcar-du: Add probe deferral debug messages

Print a message when the HDMI I2C slave encoder can't be found to help
debugging probe deferral issues.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
8 years agodrm: rcar-du: lvds: Add R-Car Gen3 support
Koji Matsuoka [Tue, 28 Jul 2015 11:12:43 +0000 (20:12 +0900)] 
drm: rcar-du: lvds: Add R-Car Gen3 support

The LVDS encoder differs slightly in Gen3 SoCs in its PLL configuration.
Add support for the Gen3 LVDS PLL parameters and startup procedure.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
8 years agodrm: rcar-du: lvds: Rename PLLEN bit to PLLON
Laurent Pinchart [Mon, 7 Sep 2015 12:28:17 +0000 (15:28 +0300)] 
drm: rcar-du: lvds: Rename PLLEN bit to PLLON

The bit is named PLLON in the datasheet, rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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