Julia Lawall [Wed, 21 Oct 2015 20:41:36 +0000 (22:41 +0200)]
clk: add missing of_node_put
for_each_matching_node_and_match performs an of_node_get on each iteration,
so a break out of the loop requires an of_node_put.
A simplified version of the semantic patch that fixes this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression e1,e2,e;
local idexpression np;
@@
for_each_matching_node_and_match(np, e1, e2) {
... when != of_node_put(np)
when != e = np
(
return np;
|
+ of_node_put(np);
? return ...;
)
...
}
// </smpl>
Besides the problem identified by the semantic patch, this patch adds an
of_node_get in front of saving np in a field of parent, to account for the
fact that this value will be put on going on to the next element in the
iteration, and then adds of_node_puts in the two loops where the parent
pointer can be freed.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Simran Rai [Mon, 19 Oct 2015 22:27:19 +0000 (15:27 -0700)]
clk: iproc: Fix PLL output frequency calculation
This patch affects the clocks that use fractional ndivider in their
PLL output frequency calculation. Instead of 2^20 divide factor, the
clock's ndiv integer shift was used. Fixed the bug by replacing ndiv
integer shift with 2^20 factor.
Signed-off-by: Simran Rai <ssimran@broadcom.com>
Signed-off-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
Cc: <stable@vger.kernel.org> # v4.1+
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Jisheng Zhang [Tue, 20 Oct 2015 11:16:47 +0000 (19:16 +0800)]
clk: berlin: bg2: remove CLK_IGNORE_UNUSED flag for sdio clk
The clocks' properties have been already properly set, so there's no
need to set this flag for sdio0 and sdio1 clk any more.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Jisheng Zhang [Tue, 20 Oct 2015 11:16:46 +0000 (19:16 +0800)]
clk: berlin: bg2q: remove CLK_IGNORE_UNUSED flag for sdio clk
Since we have added the necessary two clks' properties in dts, we can
remove the "sdio" clk's CLK_IGNORE_UNUSED flag now.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Michael Turquette [Wed, 21 Oct 2015 09:26:51 +0000 (02:26 -0700)]
Merge branch 'clk-shmobile-for-v4.4' of git://git./linux/kernel/git/geert/renesas-drivers into clk-next
Geert Uytterhoeven [Mon, 12 Oct 2015 09:25:44 +0000 (11:25 +0200)]
clk: shmobile: Add r8a7795 CPG Core Clock Definitions
Add all R-Car H3 Clock Pulse Generator Core Clock Outputs, as listed in
Table 8.2a ("List of Clocks [R-Car H3]") of the R-Car Gen3 datasheet
(rev. 0.5E).
Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and
RPCSRC) are not included, as they're used as internal clock sources
only.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Magnus Damm <damm+renesas@opensource.se>
Geert Uytterhoeven [Mon, 12 Oct 2015 09:05:24 +0000 (11:05 +0200)]
clk: shmobile: Add new Renesas CPG/MSSR DT bindings
On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse
Generator) and MSSR (Module Standby and Software Reset) blocks are
intimately connected, and share the same register block.
Hence it makes sense to describe these two blocks using a
single device node in DT, instead of using a hierarchical structure with
multiple nodes, using a mix of generic and SoC-specific bindings.
These new DT bindings are intended to replace the existing DT bindings
for CPG core clocks ("renesas,*-cpg-clocks", "renesas,cpg-div6-clock")
and module clocks ("renesas,*-mstp-clocks"), at least for new SoCs.
This will make it easier to add module reset support later, which is
currently not implemented, and difficult to achieve using the existing
bindings due to the intertwined register layout.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Magnus Damm <damm+renesas@opensource.se>
Michael Turquette [Tue, 20 Oct 2015 15:49:11 +0000 (08:49 -0700)]
Merge tag 'tegra-for-4.4-clk' of git://git./linux/kernel/git/tegra/linux into clk-next
clk: tegra: Changes for v4.4-rc1
This contains a patch that allows the DFLL to use clock rates higher
than 2^31-1 Hz by using the ->determine_rate() operation instead of the
->round_rate() operation. Other than that there's a couple of cleanups
in preparation for Tegra210 support.
Rhyland Klein [Thu, 18 Jun 2015 21:28:17 +0000 (17:28 -0400)]
clk: tegra: Modify tegra_audio_clk_init to accept more plls
tegra_audio_clk_init was written expecting a single PLL to be
passed in directly. Change this to accept an array which will
allow for supporting multiple plls and specifying specific data
about them, like their parent, which may change over time.
Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Thu, 18 Jun 2015 21:28:16 +0000 (17:28 -0400)]
clk: tegra: Update struct tegra_clk_pll_params kerneldoc
Benson Leung pointed out that the kerneldoc for this structure has
become stale. Update the field descriptions to match the structure
content.
Reported-by: Benson Leung <bleung@chromium.org>
Acked-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rhyland Klein [Mon, 13 Apr 2015 16:38:17 +0000 (12:38 -0400)]
clk: tegra: Fix comments for structure definitions
Some fields moved from the tegra_clk_pll struct to the tegra_pll_params
struct. Update the struct comments to reflect where the fields really
are.
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 14 Aug 2015 10:40:09 +0000 (12:40 +0200)]
clk: tegra: dfll: Monitor code is DEBUG_FS only
The monitor code is used with DEBUG_FS only, so move it into the
corresponding #ifdef block to avoid potential compiler warnings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Geliang Tang [Sun, 18 Oct 2015 15:31:12 +0000 (23:31 +0800)]
clk: keystone: fix a trivial typo
s/regsiter/register/
Signed-off-by: Geliang Tang <geliangtang@163.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 16 Oct 2015 23:35:11 +0000 (16:35 -0700)]
clk: mvebu: Use of_clk_get_parent_name()
This reverts commit
e79b202c632f24f49f2eb9459b88b5fd9e332263.
Now that we use of_clk_get() inside of_clk_get_parent_name() we
can safely use it here.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Archit Taneja [Wed, 14 Oct 2015 12:54:45 +0000 (18:24 +0530)]
clk: qcom: mmcc-8960: Add DSI related clocks
Add rcg and branch clk structs for DSI1 and DSI2 blocks found in MSM8960
and APQ8064. Each DSI instance has 4 pairs of rcg and branch clocks.
Populate arrays mmcc_msm8960_clks and mmcc_apq8064_clks with these clocks.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Archit Taneja [Wed, 14 Oct 2015 12:54:44 +0000 (18:24 +0530)]
clk: qcom: clk-rcg: Add customized clk_ops for DSI RCGs
DSI specific RCG clocks required customized clk_ops. There are
a total of 4 RCGs per DSI block: DSI, BYTE, ESC and PIXEL.
There are a total of 2 clocks coming from the DSI PLL, which serve as
inputs to these RCGs. The BYTE and ESC RCGs are fed by one of the
post dividers of DSI1 or DSI2 PLLs, and the DSI and PIXEL RCGs are fed by
another divider of the PLL.
In each of the 2 groups above, only one of the clocks sets its parent.
These are BYTE RCG and DSI RCG for each of the groups respectively, as
shown in the diagram below.
The DSI and BYTE RCGs serve as bypass clocks. We create a new set of ops
clk_rcg_bypass2_ops, which are like the regular bypass ops, but don't
take in a freq table, since the DSI driver using these clocks is
parent-able.
The PIXEL RCG needs to derive the required pixel clock using dsixpll.
It parses a m/n frac table to retrieve the correct clock.
The ESC RCG doesn't have a frac M/N block, it can just apply a pre-
divider. Its ops simply check if the required clock rate can be
achieved by the pre-divider.
+-------------------+
| |---dsixpllbyte---o---> To byte RCG
| | | (sets parent rate)
| | |
| | |
| DSI 1/2 PLL | |
| | o---> To esc RCG
| | (doesn't set parent rate)
| |
| |----dsixpll-----o---> To dsi RCG
+-------------------+ | (sets parent rate)
( x = 1, 2 ) |
|
o---> To pixel rcg
(doesn't set parent rate)
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 16 Oct 2015 19:05:07 +0000 (12:05 -0700)]
clk: xgene: Remove unused setup.h include
This include doesn't look to be used, and compiling this file on
arm64 still works, so remove it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Javier Martinez Canillas [Tue, 13 Oct 2015 14:18:18 +0000 (16:18 +0200)]
clk: Allow drivers to build if COMPILE_TEST is enabled
These drivers only have runtime but no build time dependencies so can be
built for testing purposes if the Kconfig COMPILE_TEST option is enabled.
This is useful to have more build coverage and make sure that drivers are
not affected by changes that could cause build regressions.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Fri, 16 Oct 2015 12:35:21 +0000 (14:35 +0200)]
clk: Make clk input parameter of __clk_get_name() const
When calling __clk_get_name() on a const clock:
warning: passing argument 1 of '__clk_get_name' discards 'const' qualifier from pointer target type
include/linux/clk-provider.h:613:13: note: expected 'struct clk *' but argument is of type 'const struct clk *'
__clk_get_name() does not modify the passed clock, hence make it const.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Fri, 16 Oct 2015 15:18:27 +0000 (17:18 +0200)]
clk: shmobile: mstp: Drop bogus closing parenthesis in error message
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Fri, 16 Oct 2015 15:14:55 +0000 (17:14 +0200)]
clk: shmobile: r8a7778: Make r8a7778_rates[] and r8a7778_divs[] static const
r8a7778_rates[] and r8a7778_divs[] are only used in clk-r8a7778.c, and
never modified.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Fri, 16 Oct 2015 15:12:32 +0000 (17:12 +0200)]
clk: Use %u to format unsigned int in of_clk_src_onecell_get()
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 16 Oct 2015 18:35:19 +0000 (11:35 -0700)]
Merge tag 'imx-clk-4.4' of git://git./linux/kernel/git/shawnguo/linux into clk-next
Pull i.MX updates from Shawn Guo:
"The i.MX clock updates for 4.4:
- A couple of fixes on i.MX31 and i.MX35 clock initialization functions
which makes mxc_timer_init() currently be called twice for DT boot.
- Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal
design target.
- Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for
Vybrid, and SPDIF_GCLK for i.MX6.
- A series from Lucas to fix early debug UART clock setup. This is
currently a one-off fix for i.MX platform, and can be extended to
become a generic solution later."
* tag 'imx-clk-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx6: Add SPDIF_GCLK clock in clock tree
clk: imx7d: add ADC root clock
clk: imx31: Do not call mxc_timer_init twice when booting with DT
clk: imx7d: retain early UART clocks during kernel init
clk: imx6: retain early UART clocks during kernel init
clk: imx5: retain early UART clocks during kernel init
clk: imx35: retain early UART clocks during kernel init
clk: imx31: retain early UART clocks during kernel init
clk: imx27: retain early UART clocks during kernel init
clk: imx25: retain early UART clocks during kernel init
clk: imx: add common logic to detect early UART usage
clk: imx35: Do not call mxc_timer_init twice when booting with DT
clk: clk-vf610: Add clock for Vybrid OCOTP controller
clk: imx: increase AXI clock rate to 264MHz for i.MX6UL
Stephen Boyd [Wed, 14 Oct 2015 21:03:07 +0000 (14:03 -0700)]
clk: Make of_clk_get_parent_name() robust with #clock-cells = 1
If a clock provider has #clock-cells = 1 and we call
of_clk_get_parent_name() on it we may end up returning the name
of the provider node if the provider doesn't have a
clock-output-names property. This doesn't make sense, especially
when you consider that calling of_clk_get_parent_name() on such a
node with different indices will return the same name each time.
Let's try getting the clock from the framework via of_clk_get()
instead, and only fallback to the node name if we have a provider
with #clock-cells = 0. This way, we can't hand out the same name
for different clocks when we don't actually know their names.
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 15 Oct 2015 23:13:50 +0000 (16:13 -0700)]
Merge branch 'clk-fixes' into clk-next
* clk-fixes:
Partially revert "clk: mvebu: Convert to clk_hw based provider APIs"
Javier Martinez Canillas [Wed, 14 Oct 2015 11:18:55 +0000 (13:18 +0200)]
clk: max77802: Update MODULE_AUTHOR() email address
The email address listed in MODULE_AUTHOR() no longer exist so to prevent
people to send emails to the old address, replace it with my current one.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Wed, 14 Oct 2015 18:23:09 +0000 (11:23 -0700)]
Partially revert "clk: mvebu: Convert to clk_hw based provider APIs"
This partially reverts commit
eca61c9ff2588e1df373e61078e1874976315839.
Thomas reports that it causes regressions on Armada XP devices.
This is because of_clk_get_parent_name() relies on the property
'clock-output-names' to resolve the name of a clock's parent,
without trying to get the clock from the framework and call
__clk_get_name(). Given that Armada XP devices don't have the
'clock-output-names' property, of_clk_get_parent_name() returns
the name of the node which doesn't match the actual parent
clock's name at all, causing CPU clocks to never link up with
their parents.
Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Julia Lawall [Fri, 9 Oct 2015 17:47:41 +0000 (19:47 +0200)]
clk: tegra: delete unneeded of_node_put
for_each_child_of_node performs an of_node_put on each iteration, so
putting an of_node_put before a continue results in a double put.
The semantic match that finds this problem is as follows
(http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
iterator name for_each_child_of_node;
@@
for_each_child_of_node(root, child) {
... when != of_node_get(child)
* of_node_put(child);
...
* continue;
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Mon, 12 Oct 2015 18:44:49 +0000 (11:44 -0700)]
Merge branch 'clk-bcm2835' into clk-next
* clk-bcm2835:
clk: bcm2835: Add support for programming the audio domain clocks
clk: bcm2835: Add binding docs for the new platform clock driver.
clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
Eric Anholt [Fri, 9 Oct 2015 01:37:24 +0000 (18:37 -0700)]
clk: bcm2835: Add support for programming the audio domain clocks
This adds support for enabling, disabling, and setting the rate of the
audio domain clocks. It will be necessary for setting the pixel clock
for HDMI in the VC4 driver and let us write a cpufreq driver. It will
also improve compatibility with user changes to the firmware's
config.txt, since our previous fixed clocks are unaware of it.
The firmware also has support for configuring the clocks through the
mailbox channel, but the pixel clock setup by the firmware doesn't
work, and it's Raspberry Pi specific anyway. The only conflicts we
should have with the firmware would be if we made firmware calls that
result in clock management (like opening firmware V3D or ISP access,
which we don't support in upstream), or on hardware over-thermal or
under-voltage (when the firmware would rewrite PLLB to take the ARM
out of overclock). If that happens, our cached .recalc_rate() results
would be incorrect, but that's no worse than our current state where
we used fixed clocks.
The existing fixed clocks in the code are left in place to provide
backwards compatibility with old device tree files.
Signed-off-by: Eric Anholt <eric@anholt.net>
Tested-by: Martin Sperl <kernel@martin.sperl.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Shengjiu Wang [Sat, 10 Oct 2015 10:15:06 +0000 (18:15 +0800)]
clk: imx6: Add SPDIF_GCLK clock in clock tree
Correct SPDIF clock setting issue in clock tree, the SPDIF_GCLK is also
one clock of SPDIF, which is missed before.
We found an issue that imx can't enter low power mode with spdif
if IMX6x_CLK_SPDIF is used as the core clock of spdif. Because
spdif driver will register IMX6x_CLK_SPDIF clock to regmap, regmap will do
clk_prepare in init function, then IMX6x_CLK_SPDIF clock is prepared in probe,
so its parent clock (PLL clock) is prepared, the prepare operation of
PLL clock is to enable the clock. But I.MX needs all PLL clock is disabled,
then it can enter low power mode.
So we can't use IMX6x_CLK_SPDIF as the core clock of spdif, the correct spdif
core clock is SPDIF_GCLK, which share same gate bit with IMX6x_CLK_SPDIF clock.
SPDIF_GCLK's parent clock is ipg clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rajendra Nayak [Thu, 8 Oct 2015 05:01:03 +0000 (10:31 +0530)]
clk: qcom: create virtual child device for TSENS
8960 family of devices have TSENS as part of GCC in hardware.
Hence DT would represent a GCC node with GCC properties as well
as TSENS. Create a virtual platform child device here for TSENS
so the driver can probe it and use the parent (GCC) to extract DT
properties.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
[sboyd@codeaurora.org: Massaged to work with devm friendly
qcom_cc_probe()]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 8 Oct 2015 17:59:32 +0000 (10:59 -0700)]
clk: qcom: Move gdsc config outside COMMON_CLK_QCOM config
Having this hidden config below the COMMON_CLK_QCOM config causes
menuconfig to stop indenting config items after it.
<*> Support for Qualcomm's clock controllers
{M} APQ8084 Global Clock Controller
<M> APQ8084 Multimedia Clock Controller
{M} IPQ806x Global Clock Controller
<M> IPQ806x LPASS Clock Controller
<M> MSM8660 Global Clock Controller
<M> MSM8916 Global Clock Controller
{M} APQ8064/MSM8960 Global Clock Controller
<M> APQ8064/MSM8960 LPASS Clock Controller
<M> MSM8960 Multimedia Clock Controller
{M} MSM8974 Global Clock Controller
<M> MSM8974 Multimedia Clock Controller
Move it up above anything else so that we don't get odd
indenting.
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 8 Oct 2015 07:11:49 +0000 (00:11 -0700)]
clk: qcom: Drop calls to qcom_cc_remove()
Now that qcom_cc_remove() is a nop, drop calls to
qcom_cc_remove() and any empty driver remove functions.
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 8 Oct 2015 06:59:57 +0000 (23:59 -0700)]
qcom: clk: Make qcom_cc_probe() fully devm safe
Some APIs in qcom_cc_probe() don't have a devm counterpart, so we
have to use the calling device's platform data to pass pointers
to the remove path. Let's use devm_add_action() instead, so that
the remove path doesn't need to do anything, allowing us to
remove qcom_cc_remove() entirely.
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gabriel Fernandez [Wed, 7 Oct 2015 09:08:58 +0000 (11:08 +0200)]
drivers: clk: st: Correct the pll-type for A9 for stih418
Add support for new PLL-type for stih418 A9-PLL.
Currently the 407_A9_PLL type being used, it is corrected with this patch
4600c28 PLL allows to reach higher frequencies
so its programming algorithm is extended.
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gabriel Fernandez [Wed, 7 Oct 2015 09:08:57 +0000 (11:08 +0200)]
drivers: clk: st: PLL rate change implementation for DVFS
Change A9 PLL rate, as per requirement from the cpufreq framework,
for DVFS. For rate change, the A9 clock needs to be temporarily sourced
from PLL external to A9 and then sourced back to A9-PLL
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Gabriel Fernandez [Wed, 7 Oct 2015 09:08:56 +0000 (11:08 +0200)]
drivers: clk: st: Support for enable/disable in Clockgen PLLs
The patch adds support for enable/disable of the Clockgen PLLs.
clkgen_pll_enable/clkgen_pll_disable added as generic function for all PLLs.
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 1 Oct 2015 19:22:54 +0000 (12:22 -0700)]
clk: qcom: Make oxili GDSC parent of oxili_cx GDSC
The oxili_cx GDSC is inside the power domain of the oxili GDSC.
Add the dependency so that the CX domain can properly power up.
Reported-by: Rob Clark <robdclark@gmail.com>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 1 Oct 2015 19:22:53 +0000 (12:22 -0700)]
PM / Domains: Make pm_genpd_{add,remove}_subdomain() available to modules
Export these symbols so they can be used in loadable kernel
modules.
Cc: Rob Clark <robdclark@gmail.com>
Cc: Rajendra Nayak <rnayak@codeaurora.org>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Rafael J. Wysocki <rjw@rjwysocki.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Mike Looijmans [Fri, 2 Oct 2015 07:15:29 +0000 (09:15 +0200)]
Add driver for the si514 clock generator chip
This patch adds the driver and devicetree documentation for the
Silicon Labs SI514 clock generator chip. This is an I2C controlled
oscillator capable of generating clock signals ranging from 100kHz
to 250MHz.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
[sboyd@codeaurora.org: Drop clk.h include, remove some casts]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Haibo Chen [Thu, 8 Oct 2015 10:59:06 +0000 (18:59 +0800)]
clk: imx7d: add ADC root clock
Add ADC root clock support in imx7d clock tree.
Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Stephen Boyd [Fri, 2 Oct 2015 18:38:20 +0000 (11:38 -0700)]
Merge branch 'v4.3-rc3-clk' of https://github.com/jamesjjliao/linux into clk-next
Pull mediatek clock support and fixes from James Liao:
"This is a collection of new Mediatek clocks support and fixes.
These patches come from Joe and me, including clock support for
subsystems, GPT and some minor fixes."
* 'v4.3-rc3-clk' of https://github.com/jamesjjliao/linux:
clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS
clk: mediatek: Add subsystem clocks of MT8173
dt-bindings: ARM: Mediatek: Document devicetree bindings for clock controllers
clk: mediatek: Fix rate and dependency of MT8173 clocks
clk: mediatek: Add fixed clocks support for Mediatek SoC.
clk: mediatek: Add __initdata and __init for data and functions
clk: mediatek: Remove unused code from MT8173.
clk: mediatek: Removed unused dpi_ck clock from MT8173
clk: mediatek: add 13mhz clock for MT8173
Stephen Boyd [Fri, 2 Oct 2015 18:34:34 +0000 (11:34 -0700)]
clk: samsung: exynos7: Staticize file scope symbols
drivers/clk/samsung/clk-exynos7.c:896:33:
warning: symbol 'fixed_rate_clks_fsys0' was not declared. Should
it be static?
drivers/clk/samsung/clk-exynos7.c:1010:33:
warning: symbol 'fixed_rate_clks_fsys1' was not declared. Should
it be static?
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 2 Oct 2015 18:31:43 +0000 (11:31 -0700)]
Merge tag 'clk-samsung-4.4' of git://linuxtv.org/snawrocki/samsung into clk-next
Pull updates from Sylwester Nawrocki:
"Fixes, improvements and addition of some missing features
of the exynos7 clock controller driver."
* tag 'clk-samsung-4.4' of git://linuxtv.org/snawrocki/samsung:
clk: samsung: exynos7: Add required clock tree for UFS
clk: samsung: exynos7: Add missing fixed_clks to cmu_info
clk: samsung: exynos7: Correct CMU_FSYS1 clocks names
clk: samsung: exynos7: Correct CMU_FSYS0 clocks names
clk: samsung: exynos7: Correct CMU_PERIS clocks names
clk: samsung: exynos7: Correct CMU_PERIC1 clocks names
clk: samsung: exynos7: Correct CMU_PERIC0 clocks names
clk: samsung: exynos7: Correct CMU_CCORE clocks names
clk: samsung: exynos7: Correct CMU_TOP1 clocks names
clk: samsung: exynos7: Correct CMU_TOP0 clocks names
clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPC
clk: samsung: exynos7: Change the CMU_TOPC block clock names
clk: samsung: exynos7: Correct nr_clk_ids for fsys1
clk: samsung: exynos7: Correct nr_clk_ids for fsys0
clk: samsung: exynos7: Fix CMU TOP1 block
clk: samsung: exynos7: Fix CMU TOPC block clock
Stephen Boyd [Fri, 2 Oct 2015 18:29:54 +0000 (11:29 -0700)]
Merge branch 'clk-fixes' into clk-next
* clk-fixes: (3 commits)
clk: ti: dflt: fix enable_reg validity check
clk: ti: fix dual-registration of uart4_ick
clk: ti: clk-7xx: Remove hardwired ABE clock configuration
Andy Shevchenko [Tue, 22 Sep 2015 15:54:12 +0000 (18:54 +0300)]
serial: 8250_dw: allow lower reference frequencies
We have couple of standard but rare used baudrates which are not supported by
1,8432MHz reference frequency. Besides that user can potentially ask for any
baudrate (via BOTHER flag) and we currently don't fully support that. Since
clk-fractional-divider is moved to use rational best approximation for
reference frequency we may amend the driver to support whatever user wants.
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Andy Shevchenko [Tue, 22 Sep 2015 15:54:11 +0000 (18:54 +0300)]
clk: fractional-divider: switch to rational best approximation
This patch converts the code to use rational best approximation algorithm which
is much more precise.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Andy Shevchenko [Tue, 22 Sep 2015 15:54:10 +0000 (18:54 +0300)]
clk: rockchip: save width in struct clk_fractional_divider
The ->mwidth and ->nwidth fields will be used by clk-fractional-divider when it
will be switched to rational base approximation algorithm.
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Andy Shevchenko [Tue, 22 Sep 2015 15:54:09 +0000 (18:54 +0300)]
clk: fractional-divider: keep mwidth and nwidth internally
The patch adds mwidth and nwidth fields to the struct clk_fractional_divider
for further usage. While here, use GENMASK() instead of open coding this
functionality.
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Andy Shevchenko [Tue, 22 Sep 2015 15:54:08 +0000 (18:54 +0300)]
clk: fractional-divider: rename prate -> parent_rate
Rename function parameter to be more explicit what it is for. This also makes
it in align with struct clk_ops.
There is no functional change.
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 2 Oct 2015 18:15:13 +0000 (11:15 -0700)]
Merge branch 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm into clk-fixes
Pull fixes from Tero Kristo:
"A few TI clock driver fixes to pull against 4.3-rc"
* 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm: (3 commits)
clk: ti: dflt: fix enable_reg validity check
clk: ti: fix dual-registration of uart4_ick
clk: ti: clk-7xx: Remove hardwired ABE clock configuration
Suman Anna [Tue, 29 Sep 2015 22:37:47 +0000 (17:37 -0500)]
clk: ti: dflt: fix enable_reg validity check
The default clock enabling functions for TI clocks -
omap2_dflt_clk_enable() and omap2_dflt_clk_disable() perform a
NULL check for the enable_reg field of the clk_hw_omap structure.
This enable_reg field however is merely a combination of the index
of the master IP module, and the offset from the master IP module's
base address. A value of 0 is perfectly valid, and the current error
checking will fail in these cases. The issue was found when trying
to enable the iva2_ck clock on OMAP3 platforms.
So, switch the check to use IS_ERR. This correction is similar to the
logic used in commit
c807dbedb5e5 ("clk: ti: fix ti_clk_get_reg_addr
error handling").
Fixes: 9f37e90efaf0 ("clk: ti: dflt: move support for default gate clock..")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Ben Dooks [Tue, 29 Sep 2015 14:01:08 +0000 (15:01 +0100)]
clk: ti: fix dual-registration of uart4_ick
On the OMAP AM3517 platform the uart4_ick gets registered
twice, causing any power management to /dev/ttyO3 to fail
when trying to wake the device up.
This solves the following oops:
[] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa09e008
[] PC is at serial_omap_pm+0x48/0x15c
[] LR is at _raw_spin_unlock_irqrestore+0x30/0x5c
Fixes: aafd900cab87 ("CLK: TI: add omap3 clock init file")
Cc: stable@vger.kernel.org
Cc: mturquette@baylibre.com
Cc: sboyd@codeaurora.org
Cc: linux-clk@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-kernel@lists.codethink.co.uk
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Peter Ujfalusi [Mon, 24 Aug 2015 07:35:02 +0000 (10:35 +0300)]
clk: ti: clk-7xx: Remove hardwired ABE clock configuration
The ABE related clocks should be configured via DT and not have it wired
inside of the kernel.
Fixes: a74c52def9ab ("clk: ti: clk-7xx: Correct ABE DPLL configuration")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Eric Anholt [Mon, 28 Sep 2015 21:22:03 +0000 (14:22 -0700)]
clk: bcm2835: Add binding docs for the new platform clock driver.
Previously we've only supported a few fixed clocks based on
assumptions about how the firmware sets up the clocks, but this
binding will let us control the actual (audio power domain) clock
manager.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Lee Jones <lee@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Eric Anholt [Mon, 28 Sep 2015 21:22:02 +0000 (14:22 -0700)]
clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.
clk-bcm2835.c predates the drivers under bcm/, but all the new BCM
drivers are going in there so let's follow them.
Signed-off-by: Eric Anholt <eric@anholt.net>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Martin Kepplinger [Tue, 29 Sep 2015 11:32:27 +0000 (13:32 +0200)]
clk: imx: use sign_extend32() and abs()
This simplifies the given function by getting rid of the manual
sign extension as well as saving an absolute value in an extra
variable.
Signed-off-by: Martin Kepplinger <martink@posteo.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Shawn Lin [Fri, 4 Sep 2015 00:15:33 +0000 (08:15 +0800)]
clk: rockchip: reset init state before mmc card initialization
mmc host controller's IO input/output timing is unpredictable if
bootloader execute tuning for HS200 mode. It might make kernel failed
to initialize mmc card in identification mode. The root cause is
tuning phase and degree setting for HS200 mode in bootloader aren't
applicable to that of identification mode in kernel stage. Anyway, we
can't force all bootloaders to reset tuning phase and degree setting
before into kernel. Simply reset it in rockchip_clk_register_mmc.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Wed, 9 Sep 2015 12:57:11 +0000 (14:57 +0200)]
clk: shmobile: div6: Grammar s/They/Their/
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Victorien Vedrine [Mon, 31 Aug 2015 08:45:07 +0000 (10:45 +0200)]
clk:mxs: Fix bug on frequency divider
On drivers/clk/mxs/clk-frac.c, the function clk_frac_round_rate returned a bad
result. The division before multiplication computes a wrong value ; the
calculation is inverted to fix the problem. The second issue is that the exact
rate have decimals and they are truncate. The consequence is that the function
clk_frac_set_rate (which use the result of clk_frac_round_rate) computes a
wrong value for the register (the rate generated can be closer to the desired
rate). The correction is : if there is decimal to the result, it is rounded to
the next larger integer.
On drivers/clk/mxs/clk-frac.c, the function clk_frac_recalc_rate returned
a bad result. The multiplication is made before the division to compute a
correct value.
Signed-off-by: Victorien Vedrine <victorien.vedrine@ophrys.net>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Andrzej Hajda [Thu, 24 Sep 2015 14:00:16 +0000 (16:00 +0200)]
clk: st: fix handling result of of_property_count_strings
The function can return negative value.
The problem has been detected using proposed semantic patch
scripts/coccinelle/tests/assign_signed_to_unsigned.cocci [1].
[1]: http://permalink.gmane.org/gmane.linux.kernel/
2046107
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Heiko Stübner [Thu, 1 Oct 2015 09:38:35 +0000 (11:38 +0200)]
clk: rockchip: don't use clk_ APIs in the pll init-callback
Separate the update of pll registers from the actual set_rate function
so that the init callback does not need to access clk-API functions.
As we now have separated the getting and setting of the pll parameters
we can also directly use these new functions in other places too.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Nicolas Ferre [Fri, 31 Jul 2015 09:43:12 +0000 (11:43 +0200)]
clk: at91: add generated clock driver
Add a new type of clocks that can be provided to a peripheral.
In addition to the peripheral clock, this new clock that can use several
input clocks as parents can generate divided rates.
This would allow a peripheral to have finer grained clocks for generating
a baud rate, clocking an asynchronous part or having more
options in frequency.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[sboyd@codeaurora.org: Transition to new clk_hw provider APIs]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Nicolas Ferre [Thu, 18 Jun 2015 12:43:29 +0000 (14:43 +0200)]
clk: at91: add PMC sama5d2 support
Add support for the new sama5d2 SoC and adapt capabilities.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Nicolas Ferre [Wed, 17 Jun 2015 12:40:39 +0000 (14:40 +0200)]
clk: at91: modify PMC peripheral clock to deal with newer register layout
As some more information is added to the PCR register, we'd better use
a copy of its content and modify just the peripheral-related bits.
Implement a read-modify-write for the enable() and disable() callbacks.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Nicolas Ferre [Wed, 17 Jun 2015 12:40:38 +0000 (14:40 +0200)]
clk: at91: cleanup PMC header file for PCR register fields
Add _MASK and _OFFSET values and cleanup register fields layout.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Wed, 20 May 2015 07:59:21 +0000 (15:59 +0800)]
clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS
Add REF2USB_TX clock support into MT8173 APMIXEDSYS. This clock
is needed by USB 3.0.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
James Liao [Wed, 20 May 2015 06:45:54 +0000 (14:45 +0800)]
clk: mediatek: Add subsystem clocks of MT8173
Most multimedia subsystem clocks will be accessed by multiple
drivers, so it's a better way to manage these clocks in CCF.
This patch adds clock support for MM, IMG, VDEC, VENC and VENC_LT
subsystems.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
James Liao [Wed, 20 May 2015 08:45:08 +0000 (16:45 +0800)]
dt-bindings: ARM: Mediatek: Document devicetree bindings for clock controllers
This adds the binding documentation for the mmsys, imgsys, vdecsys,
vencsys and vencltsys controllers found on Mediatek SoCs.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
James Liao [Fri, 10 Jul 2015 03:41:15 +0000 (11:41 +0800)]
clk: mediatek: Fix rate and dependency of MT8173 clocks
Remove the dependency from clk_null, and give all root clocks a
typical rate, include clkph_mck_o, usb_syspll_125m and hdmitx_dig_cts.
dpi_ck was removed due to no clock reference to it.
Replace parent clock of infra_cpum with cpum_ck, which is an external
clock and can be defined in the device tree.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
James Liao [Fri, 10 Jul 2015 03:39:15 +0000 (11:39 +0800)]
clk: mediatek: Add fixed clocks support for Mediatek SoC.
This patch adds fixed clocks support by using CCF fixed-rate
clock implementation.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
James Liao [Tue, 28 Jul 2015 07:37:34 +0000 (15:37 +0800)]
clk: mediatek: Add __initdata and __init for data and functions
Add __init for clock registration functions, and add __initdata for
mtk_gate_regs initial structures.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
James Liao [Tue, 28 Jul 2015 06:53:29 +0000 (14:53 +0800)]
clk: mediatek: Remove unused code from MT8173.
Remove unused header files from MT8173, and remove unused
keywords from function declaration.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
James Liao [Tue, 28 Jul 2015 06:30:03 +0000 (14:30 +0800)]
clk: mediatek: Removed unused dpi_ck clock from MT8173
The dpi_ck clock can be removed because it not actually used
in topckgen and subsystems.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Joe.C [Mon, 13 Jul 2015 09:32:48 +0000 (17:32 +0800)]
clk: mediatek: add 13mhz clock for MT8173
Add 13mhz clock used by GPT timer in infracfg.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Alexander Stein [Wed, 30 Sep 2015 06:23:40 +0000 (08:23 +0200)]
clk: imx31: Do not call mxc_timer_init twice when booting with DT
mxc_timer_init must not be called from within mx31_clocks_init_dt. It will
eventually be called by imx31_timer_init_dt
(drivers/clocksource/timer-imx-gpt.c).
This arranges the initialization code similar to clk-imx27.c
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Guo Zeng [Fri, 14 Aug 2015 01:11:03 +0000 (01:11 +0000)]
clk: atlas7: fix noc/socket disconnect/reconnect for unit clks
Power management on of NoC(Notwork On Chip) requires that disconnect
and reconnect routine should been done during clk disable/enable.
also there are different types of clocks,
For NoC Macro clocks, write idle_bit and wait for hardward ACK;
For Socket clocks, write idle_bit;
For others, do nothing.
Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Guo Zeng [Fri, 14 Aug 2015 01:11:02 +0000 (01:11 +0000)]
clk: atlas7: move variable-definition together
re-order the codes more reasonable by moving variable-definition
together.
Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Linus Torvalds [Sun, 27 Sep 2015 11:50:08 +0000 (07:50 -0400)]
Linux 4.3-rc3
Linus Torvalds [Sun, 27 Sep 2015 10:51:42 +0000 (06:51 -0400)]
Merge branch 'x86-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"Two bugfixes from Andy addressing at least some of the subtle NMI
related wreckage which has been reported by Sasha Levin"
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/nmi/64: Fix a paravirt stack-clobbering bug in the NMI code
x86/paravirt: Replace the paravirt nop with a bona fide empty function
Linus Torvalds [Sun, 27 Sep 2015 10:50:23 +0000 (06:50 -0400)]
Merge branch 'irq-urgent-for-linus' of git://git./linux/kernel/git/tip/tip
Pull irq fix from Thomass Gleixner:
"A bugfix for the atmel aic5 irq chip driver which caches the wrong
data and thereby breaking resume"
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/atmel-aic5: Use per chip mask caches in mask/unmask()
Linus Torvalds [Sun, 27 Sep 2015 10:48:48 +0000 (06:48 -0400)]
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"Just two fixes: wire up the new system calls added during the last
merge window, and fix another user access site"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: alignment: fix alignment handling for uaccess changes
ARM: wire up new syscalls
Linus Torvalds [Sun, 27 Sep 2015 10:45:18 +0000 (06:45 -0400)]
Merge tag 'armsoc-fixes' of git://git./linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"Our first real batch of fixes this release cycle. Nothing really
concerning, and diffstat is a bit inflated due to some DT contents
moving around on STi platforms.
There's a collection of them here:
- A fixup for a build breakage that hits on arm64 allmodconfig in
QCOM SCM firmware drivers
- MMC fixes for OMAP that had quite a bit of breakage this merge
window.
- Misc build/warning fixes on PXA and OMAP
- A couple of minor fixes for Beagleboard X15 which is now starting
to see a few more users in the wild"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
ARM: sti: dt: adapt DT to fix probe/bind issues in DRM driver
ARM: dts: fix omap2+ address translation for pbias
firmware: qcom: scm: Add function stubs for ARM64
ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2
ARM: omap2plus_defconfig: enable GPIO_PCA953X
ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets
ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late
ARM: dts: am57xx-beagle-x15: Update Phy supplies
ARM: pxa: balloon3: Fix build error
ARM: dts: Fixup model name for HP t410 dts
ARM: dts: DRA7: fix a typo in ethernet
ARM: omap2plus_defconfig: make PCF857x built-in
ARM: dts: Use ti,pbias compatible string for pbias
ARM: OMAP5: Cleanup options for SoC only build
ARM: DRA7: Select missing options for SoC only build
ARM: OMAP2+: board-generic: Remove stale of_irq macros
ARM: OMAP4+: PM: erratum is used by OMAP5 and DRA7 as well
ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi
ARM: dts: am57xx-beagle-x15: Add wakeup irq for mcp79410
ARM: dts: am335x-phycore-som: Fix mpu voltage
...
Linus Torvalds [Sun, 27 Sep 2015 10:42:54 +0000 (06:42 -0400)]
Merge branch 'for-next' of git://git.samba.org/sfrench/cifs-2.6
Pull CIFS fixes from Steve French:
"Four fixes from testing at the recent SMB3 Plugfest including two
important authentication ones (one fixes authentication problems to
some popular servers when clock times differ more than two hours
between systems, the other fixes Kerberos authentication for SMB3)"
* 'for-next' of git://git.samba.org/sfrench/cifs-2.6:
fix encryption error checks on mount
[SMB3] Fix sec=krb5 on smb3 mounts
cifs: use server timestamp for ntlmv2 authentication
disabling oplocks/leases via module parm enable_oplocks broken for SMB3
Olof Johansson [Sun, 27 Sep 2015 05:23:26 +0000 (22:23 -0700)]
Merge tag 'pxa-fixes-v4.3' of https://github.com/rjarzmik/linux into fixes
ARM: pxa: fixes for v4.3
These fixes are mainly regression fixes triggered by irq changes,
common clock framework introduction and sound side-effect of
other platforms.
* tag 'pxa-fixes-v4.3' of https://github.com/rjarzmik/linux:
ARM: pxa: balloon3: Fix build error
ARM: pxa: ssp: Fix build error by removing originally incorrect DT binding
ARM: pxa: fix DFI bus lockups on startup
Signed-off-by: Olof Johansson <olof@lixom.net>
Olof Johansson [Sun, 27 Sep 2015 05:22:31 +0000 (22:22 -0700)]
Merge tag 'omap-for-v4.3/fixes-rc2' of git://git./linux/kernel/git/tmlind/linux-omap into fixes
Fixes for omaps for v4.3-rc cycle:
- Two more patches to fix most of the MMC regressions with the
PBIAS regulator changes. At least two MMC driver related issues
still seems to remain for omap3 legacy booting and omap4 duovero.
Note that the dts changes depend on a recent regulator fix, and
are based on the regulator commit now in mainline kernel
- Enable autoidle for am43xx clocks to prevent clocks from staying
always on
- Fix i2c5 pinctrl offsets for omap5-uevm
- Enable PCA953X as that's needed for HDMI to work on omap5
- Update phy supplies for beagle x15 beta board
- Use palmas-usb for on beagle x15 to start using the related
driver that recently got merged
* tag 'omap-for-v4.3/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: fix omap2+ address translation for pbias
ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2
ARM: omap2plus_defconfig: enable GPIO_PCA953X
ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets
ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late
ARM: dts: am57xx-beagle-x15: Update Phy supplies
regulator: pbias: program pbias register offset in pbias driver
ARM: omap2plus_defconfig: Enable MUSB DMA support
ARM: DRA752: Add ID detect for ES2.0
ARM: OMAP3: vc: fix 'or' always true warning
ARM: OMAP2+: Fix booting if no timer parent clock is available
ARM: OMAP2+: omap-device: fix race deferred probe of omap_hsmmc vs omap_device_late_init
Signed-off-by: Olof Johansson <olof@lixom.net>
Linus Torvalds [Sun, 27 Sep 2015 01:05:23 +0000 (21:05 -0400)]
Merge git://git./linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu:
"This fixes the following issues:
- check the return value of platform_get_irq as signed int in xgene.
- skip adf_dev_restore on virtual functions in qat.
- fix double-free with backlogged requests in marvell_cesa"
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
hwrng: xgene - fix handling platform_get_irq
crypto: qat - VF should never trigger SBR on PH
crypto: marvell - properly handle CRYPTO_TFM_REQ_MAY_BACKLOG-flagged requests
Linus Torvalds [Sun, 27 Sep 2015 01:02:42 +0000 (21:02 -0400)]
Merge git://git./linux/kernel/git/nab/target-pending
Pull SCSI target fixes from Nicholas Bellinger:
"This includes a iser-target series from Jenny + Sagi @ Mellanox that
addresses the few remaining active I/O shutdown bugs, along with a
patch to support zero-copy for immediate data payloads that gives a
nice performance improvement for small block WRITEs.
Also included are some recent >= v4.2 regression bug-fixes. The most
notable is a RCU conversion regression for SPC-3 PR registrations, and
recent removal of obsolete RFC-3720 markers that introduced a login
regression bug with MSFT iSCSI initiators.
Thanks to everyone who has been testing + reporting bugs for v4.x"
* git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending:
iscsi-target: Avoid OFMarker + IFMarker negotiation
target: Make TCM_WRITE_PROTECT failure honor D_SENSE bit
target: Fix target_sense_desc_format NULL pointer dereference
target: Propigate backend read-only to core_tpg_add_lun
target: Fix PR registration + APTPL RCU conversion regression
iser-target: Skip data copy if all the command data comes as immediate
iser-target: Change the recv buffers posting logic
iser-target: Fix pending connections handling in target stack shutdown sequnce
iser-target: Remove np_ prefix from isert_np members
iser-target: Remove unused variables
iser-target: Put the reference on commands waiting for unsol data
iser-target: remove command with state ISTATE_REMOVE
Linus Torvalds [Sun, 27 Sep 2015 01:00:28 +0000 (21:00 -0400)]
Merge tag 'usb-4.3-rc3' of git://git./linux/kernel/git/gregkh/usb
Pull USB fixes from Greg KH:
"Here are some USB driver fixes for 4.3-rc3.
There's the usual assortment of new device ids, combined with xhci and
gadget driver fixes. Full details in the shortlog. All of these have
been in linux-next with no reported problems"
* tag 'usb-4.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (34 commits)
MAINTAINERS: remove amd5536udc USB gadget driver maintainer
USB: whiteheat: fix potential null-deref at probe
xhci: init command timeout timer earlier to avoid deleting it uninitialized
xhci: change xhci 1.0 only restrictions to support xhci 1.1
usb: xhci: exit early in xhci_setup_device() if we're halted or dying
usb: xhci: stop everything on the first call to xhci_stop
usb: xhci: Clear XHCI_STATE_DYING on start
usb: xhci: lock mutex on xhci_stop
xhci: Move xhci_pme_quirk() behind #ifdef CONFIG_PM
xhci: give command abortion one more chance before killing xhci
usb: Use the USB_SS_MULT() macro to get the burst multiplier.
usb: dwc3: gadget: Fix BUG in RT config
usb: musb: fix cppi channel teardown for isoch transfer
usb: phy: isp1301: Export I2C module alias information
usb: gadget: drop null test before destroy functions
usb: gadget: dummy_hcd: in transfer(), return data sent, not limit
usb: gadget: dummy_hcd: fix rescan logic for transfer
usb: gadget: dummy_hcd: fix unneeded else-if condition
usb: gadget: dummy_hcd: emulate sending zlp in packet logic
usb: musb: dsps: fix polling in device-only mode
...
Linus Torvalds [Sun, 27 Sep 2015 00:58:38 +0000 (20:58 -0400)]
Merge tag 'tty-4.3-rc3' of git://git./linux/kernel/git/gregkh/tty
Pull serial driver fix from Greg KH:
"Here is one serial driver fix for 4.3-rc3 that resolves a module
loading issue due to splitting up of the 8250 driver into smaller
pieces. It's been in linux-next with no reported problems"
* tag 'tty-4.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
tty: serial: Add missing module license for 8250_base.ko
Linus Torvalds [Sun, 27 Sep 2015 00:56:50 +0000 (20:56 -0400)]
Merge tag 'staging-4.3-rc3' of git://git./linux/kernel/git/gregkh/staging
Pull staging driver fixes from Greg KH:
"Here are some tiny staging driver and documentation fixes for 4.3-rc3.
All of these resolve reported issues that people have found and have
been in the linux-next tree for a while with no problems"
* tag 'staging-4.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
MAINTAINERS: Update email address for Martyn Welch
staging: ion: fix corruption of ion_import_dma_buf
staging: dgap: Remove myself from the MAINTAINERS file
staging: most: Add dependency to HAS_IOMEM
staging: unisys: remove reference of visorutil
staging: unisys: visornic: handle error return from device registration
staging: unisys: stop device registration before visorbus registration
staging: unisys: visorbus: Unregister driver on error
staging: unisys: visornic: Fix receive bytes statistics
staging: unisys: unregister netdev when create debugfs fails
staging: fbtft: replace master->setup() with spi_setup()
staging: fbtft: fix 9-bit SPI support detection
staging/lustre: change Lustre URLs and mailing list
staging/android: Update ION TODO per LPC discussion
Staging: most: MOST and MOSTCORE should depend on HAS_DMA
staging: most: fix HDM_USB dependencies and build errors
Linus Torvalds [Sun, 27 Sep 2015 00:54:53 +0000 (20:54 -0400)]
Merge tag 'driver-core-4.3-rc3' of git://git./linux/kernel/git/gregkh/driver-core
Pull driver core fix from Greg KH:
"Here is one driver core fix for 4.3-rc3 that resolves a reported oops"
* tag 'driver-core-4.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
cpu/cacheinfo: Fix teardown path
Linus Torvalds [Sun, 27 Sep 2015 00:53:15 +0000 (20:53 -0400)]
Merge tag 'char-misc-4.3-rc3' of git://git./linux/kernel/git/gregkh/char-misc
Pull char/misc driver fixes from Greg KH:
"Here's some tiny char and misc driver fixes that resolve some reported
errors for 4.3-rc3.
All of these have been in linux-next with no problems for a while"
* tag 'char-misc-4.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc:
extcon: Fix attached value returned by is_extcon_changed
Drivers: hv: vmbus: fix init_vp_index() for reloading hv_netvsc
mei: fix debugfs files leak on error path
thunderbolt: Allow loading of module on recent Apple MacBooks with thunderbolt 2 controller
Linus Torvalds [Sat, 26 Sep 2015 10:01:33 +0000 (06:01 -0400)]
Merge git://git./linux/kernel/git/davem/net
Pull networking fixes from David Miller:
1) When we run a tap on netlink sockets, we have to copy mmap'd SKBs
instead of cloning them. From Daniel Borkmann.
2) When converting classical BPF into eBPF, fix the setting of the
source reg to BPF_REG_X. From Tycho Andersen.
3) Fix igmpv3/mldv2 report parsing in the bridge multicast code, from
Linus Lussing.
4) Fix dst refcounting for ipv6 tunnels, from Martin KaFai Lau.
5) Set NLM_F_REPLACE flag properly when replacing ipv6 routes, from
Roopa Prabhu.
6) Add some new cxgb4 PCI device IDs, from Hariprasad Shenai.
7) Fix headroom tests and SKB leaks in ipv6 fragmentation code, from
Florian Westphal.
8) Check DMA mapping errors in bna driver, from Ivan Vecera.
9) Several 8139cp bug fixes (dev_kfree_skb_any in interrupt context,
misclearing of interrupt status in TX timeout handler, etc.) from
David Woodhouse.
10) In tipc, reset SKB header pointer after skb_linearize(), from Erik
Hugne.
11) Fix autobind races et al. in netlink code, from Herbert Xu with
help from Tejun Heo and others.
12) Missing SET_NETDEV_DEV in sunvnet driver, from Sowmini Varadhan.
13) Fix various races in timewait timer and reqsk_queue_hadh_req, from
Eric Dumazet.
14) Fix array overruns in mac80211, from Johannes Berg and Dan
Carpenter.
15) Fix data race in rhashtable_rehash_one(), from Dmitriy Vyukov.
16) Fix race between poll_one_napi and napi_disable, from Neil Horman.
17) Fix byte order in geneve tunnel port config, from John W Linville.
18) Fix handling of ARP replies over lightweight tunnels, from Jiri
Benc.
19) We can loop when fib rule dumps cross multiple SKBs, fix from Wilson
Kok and Roopa Prabhu.
20) Several reference count handling bug fixes in the PHY/MDIO layer
from Russel King.
21) Fix lockdep splat in ppp_dev_uninit(), from Guillaume Nault.
22) Fix crash in icmp_route_lookup(), from David Ahern.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (116 commits)
net: Fix panic in icmp_route_lookup
net: update docbook comment for __mdiobus_register()
ppp: fix lockdep splat in ppp_dev_uninit()
net: via/Kconfig: GENERIC_PCI_IOMAP required if PCI not selected
phy: marvell: add link partner advertised modes
net: fix net_device refcounting
phy: add phy_device_remove()
phy: fixed-phy: properly validate phy in fixed_phy_update_state()
net: fix phy refcounting in a bunch of drivers
of_mdio: fix MDIO phy device refcounting
phy: add proper phy struct device refcounting
phy: fix mdiobus module safety
net: dsa: fix of_mdio_find_bus() device refcount leak
phy: fix of_mdio_find_bus() device refcount leak
ip6_tunnel: Reduce log level in ip6_tnl_err() to debug
ip6_gre: Reduce log level in ip6gre_err() to debug
fib_rules: fix fib rule dumps across multiple skbs
bnx2x: byte swap rss_key to comply to Toeplitz specs
net: revert "net_sched: move tp->root allocation into fw_init()"
lwtunnel: remove source and destination UDP port config option
...
Lucas Stach [Mon, 21 Sep 2015 16:54:04 +0000 (18:54 +0200)]
clk: imx7d: retain early UART clocks during kernel init
Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Mon, 21 Sep 2015 16:54:03 +0000 (18:54 +0200)]
clk: imx6: retain early UART clocks during kernel init
Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Mon, 21 Sep 2015 16:54:02 +0000 (18:54 +0200)]
clk: imx5: retain early UART clocks during kernel init
Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Mon, 21 Sep 2015 16:54:01 +0000 (18:54 +0200)]
clk: imx35: retain early UART clocks during kernel init
Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Lucas Stach [Mon, 21 Sep 2015 16:54:00 +0000 (18:54 +0200)]
clk: imx31: retain early UART clocks during kernel init
Make sure to keep UART clocks enabled during kernel init if
earlyprintk or earlycon are active.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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