Russell King [Sun, 22 Feb 2009 21:00:55 +0000 (21:00 +0000)]
[ARM] omap: ensure that failing power domain lookups produce errors
Use pr_err() for errors rather than pr_debug(). pr_debug() are
compiled away unless -DDEBUG is used.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Fri, 6 Feb 2009 03:45:28 +0000 (20:45 -0700)]
[ARM] OMAP3 powerdomains: make USBTLL SAR only available on ES3.1 and beyond
Richard Woodruff writes that chip errata prevent USBTLL SAR from working
on OMAP3 ES levels before ES3.1:
http://marc.info/?l=linux-arm-kernel&m=
123319614808833&w=2
Update the OMAP3 powerdomain structures appropriately.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Fri, 6 Feb 2009 03:45:25 +0000 (20:45 -0700)]
[ARM] OMAP3: update ES level flags to discriminate between post-ES2 revisions
Some OMAP3 chip behaviors change in ES levels after ES2. Modify the
existing omap_chip flags to add options for ES3.0 and ES3.1.
Add a new macro, CHIP_GE_OMAP3430ES2, to cover ES levels from ES2
onwards - a common pattern for OMAP3 features. Update all current
users of the omap_chip macros to use this new macro.
Also add CHIP_GE_OMAP3430ES3_1 to cover the USBTLL SAR errata case
(described and fixed in the following patch)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 19 Feb 2009 13:29:22 +0000 (13:29 +0000)]
[ARM] omap: add support for bypassing DPLLs
This roughly corresponds with OMAP commits:
7d06c48,
3241b19,
88b5d9b,
18a5500,
9c909ac,
5c6497b,
8b1f0bd,
2ac1da8.
For both OMAP2 and OMAP3, we note the reference and bypass clocks in
the DPLL data structure. Whenever we modify the DPLL rate, we first
ensure that both the reference and bypass clocks are enabled. Then,
we decide whether to use the reference and DPLL, or the bypass clock
if the desired rate is identical to the bypass rate, and program the
DPLL appropriately. Finally, we update the clock's parent, and then
disable the unused clocks.
This keeps the parents correctly balanced, and more importantly ensures
that the bypass clock is running whenever we reprogram the DPLL. This
is especially important because the procedure for reprogramming the DPLL
involves switching to the bypass clock.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 12 Feb 2009 10:12:59 +0000 (10:12 +0000)]
[ARM] omap: arrange for clock recalc methods to return the rate
linux-omap source commit
33d000c99ee393fe2042f93e8422f94976d276ce
introduces a way to "dry run" clock changes before they're committed.
However, this involves putting logic to handle this into each and
every recalc function, and unfortunately due to the caching, led to
some bugs.
Solve both of issues by making the recalc methods always return the
clock rate for the clock, which the caller decides what to do with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:35:31 +0000 (12:35 -0700)]
[ARM] OMAP2/3 clock: don't tinker with hardirqs when they are supposed to be disabled
Clock rate change code executes inside a spinlock with hardirqs
disabled. The only code that should be messing around with the
hardirq state should be the plat-omap/clock.c code. In the
omap2_reprogram_dpllcore() case, this probably just wastes cycles, but
in the omap3_core_dpll_m2_set_rate() case, this is a nasty bug.
linux-omap source commit is
b9b6208dadb5e0d8b290900a3ffa911673ca97ed.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sat, 31 Jan 2009 11:02:37 +0000 (11:02 +0000)]
[ARM] omap: fix clockdomain enable/disable ordering
Based on a patch from Paul Walmsley <paul@pwsan.com>:
omap2_clk_enable() should enable a clock's clockdomain before
attempting to enable its parent clock's clockdomain. Similarly, in
the unlikely event that the parent clock enable fails, the clockdomain
should be disabled.
linux-omap source commit is
6d6e285e5a7912b1ea68fadac387304c914aaba8.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sat, 31 Jan 2009 11:00:17 +0000 (11:00 +0000)]
[ARM] omap: fix usecount decrement bug
Based upon a patch from Paul Walmsley <paul@pwsan.com>:
If _omap2_clk_enable() fails, the clock's usecount must be decremented
by one no matter whether the clock has a parent or not.
but reorganised a bit.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:35:09 +0000 (12:35 -0700)]
[ARM] OMAP clock: drop clk_get_usecount()
This function is race-prone and mistakenly conveys the impression to
drivers that it is part of the clock interface. Get rid of it: core
code that absolutely needs this can just check clk->usecount. Drivers
should not use it at all.
linux-omap source commit is
5df9e4adc2f6a6d55aca53ee27b8baad18897c05.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:35:06 +0000 (12:35 -0700)]
[ARM] OMAP2/3 clock: convert remaining MPU barriers into OCP barriers
Several parts of the OMAP2/3 clock code use wmb() to try to ensure
that the hardware write completes before continuing. This approach is
problematic: wmb() only ensures that the write leaves the ARM. It
does not ensure that the write actually reaches the endpoint device.
The endpoint device in this case - either the PRM, CM, or SCM - is
three interconnects away from the ARM - and the final interconnect is
low-speed. And the OCP interconnects will post the write, and who
knows how long that will take to complete. So the wmb() is not what
we want. Worse, the wmb() is indiscriminate; it causes the ARM to
flush any other unrelated buffered writes and wait for the local
interconnect to acknowledge them - potentially very expensive.
Fix this by converting the wmb()s into readbacks of the same PRM/CM/SCM
register. Since the PRM/CM/SCM devices use a single OCP thread, this
will cause the MPU to block while waiting for posted writes to that device
to complete.
linux-omap source commit is
260f5487848681b4d8ea7430a709a601bbcb21d1.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:35:03 +0000 (12:35 -0700)]
[ARM] OMAP2xxx clock: consolidate DELAYED_APP clock commits; fix barrier
Consolidate the commit code for DELAYED_APP clocks into a subroutine,
_omap2xxx_clk_commit(). Also convert the MPU barrier wmb() into an
OCP barrier, since with an MPU barrier, we have no guarantee that the
write actually reached the endpoint device.
linux-omap source commit is
0f5bdb736515801b296125d16937a21ff7b3cfdc.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:35:01 +0000 (12:35 -0700)]
[ARM] OMAP2/3 clock: don't use a barrier after clk_disable()
clk_disable() previously used an ARM barrier, wmb(), to try to ensure
that the hardware write completed before continuing. There are some
problems with this approach.
The first problem is that wmb() only ensures that the write leaves the
ARM -- not that it actually reaches the endpoint device. In this
case, the endpoint device - either the PRM, CM, or SCM - is three
interconnects away from the ARM, and the final interconnect is
low-speed. And the OCP interconnects will post the write, who knows
how long that will take to complete. So the wmb() is not really what
we want.
Worse, the wmb() is indiscriminate; it will cause the ARM to flush any
other unrelated buffered writes and wait for the local interconnect to
acknowledge them - potentially very expensive.
This first problem could be fixed by doing a readback of the same PRM/CM/SCM
register. Since these devices use a single OCP thread, this will cause the
MPU to wait for the write to complete.
But the primary problem is a conceptual one: clk_disable() should not
need any kind of barrier. clk_enable() needs one since device driver
code must not access a device until its clocks are known to be
enabled. But clk_disable() has no such restriction.
Since blocking the MPU on a PRM/CM/SCM write can be a very
high-latency operation - several hundred MPU cycles - it's worth
avoiding this barrier if possible.
linux-omap source commit is
f4aacad2c0ed1055622d5c1e910befece24ef0e2.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sat, 31 Jan 2009 10:05:51 +0000 (10:05 +0000)]
[ARM] omap: create a proper tree of clocks
Traditionally, we've tracked the parent/child relationships between
clk structures by setting the child's parent member to point at the
upstream clock. As a result, when decending the tree, we have had
to scan all clocks to find the children.
Avoid this wasteful scanning by keeping a list of the clock's children.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 29 Jan 2009 19:33:19 +0000 (19:33 +0000)]
[ARM] omap: clks: call recalc after any rate change
This implements the remainder of:
OMAP clock: move rate recalc, propagation code up to plat-omap/clock.c
from Paul Walmsley which is not covered by the previous:
[ARM] omap: move clock propagation into core omap clock code
[ARM] omap: remove unnecessary calls to propagate_rate()
[ARM] omap: move propagate_rate() calls into generic omap clock code
commits.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:27:48 +0000 (12:27 -0700)]
[ARM] OMAP2/3 clock: use standard set_rate fn in omap2_clk_arch_init()
Use the standard clk_set_rate() function in omap2_clk_arch_init()
rather than omap2_select_table_rate() -- this will ensure that clock
rates are recalculated and propagated correctly after those operations
are consolidated into clk_set_rate().
linux-omap source commit is
03c03330017eeb445b01957608ff5db49a7151b6.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tero Kristo [Wed, 28 Jan 2009 19:27:45 +0000 (12:27 -0700)]
[ARM] OMAP3: PM: Make sure clk_disable_unused() order is correct
Current implementation will disable clocks in the order defined in clock34xx.h,
at least DPLL4_M2X2 will hang in certain cases (and prevent retention / off)
if clocks are not disabled in correct order. This patch makes sure the parent
clocks will be active when disabling a clock.
linux-omap source commit is
672680063420ef8c8c4e7271984bb9cc08171d29.
Signed-off-by: Tero Kristo <tero.kristo@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:27:42 +0000 (12:27 -0700)]
[ARM] OMAP3 clock: add omap3_core_dpll_m2_set_rate()
Add the omap3_core_dpll_m2_set_rate() function to the OMAP3 clock code,
which calls into the SRAM function omap3_sram_configure_core_dpll() to
change the CORE DPLL M2 divider. (SRAM code is necessary since rate changes
on clocks upstream from the SDRC can glitch SDRAM accesses.)
Use this function for the set_rate function pointer in the dpll3_m2_ck
struct clk. With this function in place, PM/OPP code should be able to
alter SDRAM speed via code similar to:
clk_set_rate(&dpll3_m2_ck, target_rate).
linux-omap source commit is
7f8b2b0f4fe52238c67d79dedcd2794dcef4dddd.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:27:39 +0000 (12:27 -0700)]
[ARM] OMAP2 SDRC: add SDRAM timing parameter infrastructure
For a given SDRAM clock rate, SDRAM chips require memory controllers
to use a specific set of timing minimums and maximums to transfer data
reliably. These parameters can be different for different memory chips
and can also potentially vary by board.
This patch adds the infrastructure for board-*.c files to pass this
timing data to the SDRAM controller init function. The timing data is
specified in an 'omap_sdrc_params' structure, in terms of SDRC
controller register values. An array of these structs, one per SDRC
target clock rate, is passed by the board-*.c file to
omap2_init_common_hw().
This patch does not define the values for different memory chips, nor
does it use the values for anything; those will come in subsequent patches.
linux-omap source commit is
bc84ecfc795c2d1c5cda8da4127cf972f488a696.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:27:37 +0000 (12:27 -0700)]
[ARM] OMAP2 SDRC: separate common OMAP2/3 code from OMAP2xxx code
Separate SDRC code common to OMAP2/3 from mach-omap2/sdrc2xxx.c to
mach-omap2/sdrc.c. Rename the OMAP2xxx-specific functions to use an
'omap2xxx' prefix rather than an 'omap2' prefix, and use "sdrc" in the
function names rather than "memory." Mark several functions
as static that should not be used outside the sdrc2xxx.c file.
linux-omap source commit is
bf1612b9d8d29379558500cd5de9ae0367c41fc4.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:27:34 +0000 (12:27 -0700)]
[ARM] OMAP2 SDRC: rename memory.c to sdrc2xxx.c
Rename arch/arm/mach-omap2/memory.c to arch/arm/mach-omap2/sdrc2xxx.c, since
it contains exclusively SDRAM-related functions. Most of the functions
are also OMAP2xxx-specific - those which are common will be separated out
in a following patch.
linux-omap source commit is
fe212f797e2efef9dc88bcb5db7cf9db3f9f562e.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:27:31 +0000 (12:27 -0700)]
[ARM] OMAP2 SDRC: move mach-omap2/memory.h into mach/sdrc.h
Move the contents of the arch/arm/mach-omap2/memory.h file to the
existing mach/sdrc.h file, and remove memory.h. Modify files which
include memory.h to include asm/arch/sdrc.h instead.
linux-omap source commit is
e7ae2d89921372fc4b9712a32cc401d645597807.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tony Lindgren [Wed, 28 Jan 2009 19:18:48 +0000 (12:18 -0700)]
[ARM] omap: Fix omap1 clock issues
This fixes booting, and is a step toward fixing things properly:
- Make enable_reg u32 instead of u16
[rmk: virtual addresses are void __iomem *, not u32]
- Get rid of VIRTUAL_IO_ADDRESS for clocks
- Use __raw_read/write instead of omap_read/write for clock registers
This patch adds a bunch of compile warnings until omap1 clock
also uses offsets.
linux-omap source commit is
9d1dff8638c9e96a401e1885f9948662e9ff9636.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:18:22 +0000 (12:18 -0700)]
[ARM] OMAP2 PRCM: clean up CM_IDLEST bits
This patch fixes a few OMAP2xxx CM_IDLEST bits that were incorrectly
marked as being OMAP2xxx-wide, when they were actually 2420-specific.
Also, originally when the PRCM register macros were defined, bit shift
macros used a "_SHIFT" suffix, and mask macros used none. This became
a source of bugs and confusion, as the mask macros were mistakenly
used for shift values. Gradually, the mask macros have been updated,
piece by piece, to add a "_MASK" suffix on the end to clarify. This
patch applies this change to the CM_IDLEST_* register bits.
The patch also adds a few bits that were missing, mostly from the 3430ES1
to ES2 revisions.
linux-omap source commits are
d18eff5b5fa15e170794397a6a94486d1f774f77,
e1f1a5cc24615fb790cc763c96d1c5cfe6296f5b, and part of
9fe6b6cf8d9e0cbb429fd64553a4b3160a9e99e1
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Jouni Hogander [Fri, 16 May 2008 10:58:18 +0000 (13:58 +0300)]
[ARM] OMAP34XX: Add miscellaneous definitions related to 34xx
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:18:19 +0000 (12:18 -0700)]
[ARM] OMAP2/3 clock: clean up mach-omap2/clock.c
This patch rolls up several cleanup patches.
1. Some unnecessarily verbose variable names are used in several clock.c
functions; clean these up per CodingStyle.
2. Remove omap2_get_clksel() and just use clk->clksel_reg and
clk->clksel_mask directly.
3. Get rid of void __iomem * usage in omap2_clksel_get_src_field.
Prepend the function name with an underscore to highlight that it is a
static function.
linux-omap source commits are
7fa95e007ea2f3c4d0ecd2779d809756e7775894,
af0ea23f1ee4a5bea3b026e38761b47089f9048a, and
91c0c979b47c44b08f80e4f8d4c990fb158d82c4.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:08:46 +0000 (12:08 -0700)]
[ARM] OMAP3 clock: disable DPLL autoidle while waiting for DPLL to lock
During _omap3_noncore_dpll_lock(), if a DPLL has no active downstream
clocks and DPLL autoidle is enabled, the DPLL may never lock, since it
will enter autoidle immediately. To resolve this, disable DPLL
autoidle while locking the DPLL, and unconditionally wait for the DPLL
to lock. This fixes some bugs where the kernel would hang when returning
from retention or return the wrong rate for the DPLL.
This patch is a collaboration with Peter de Schrijver
<peter.de-schrijver@nokia.com> and Kevin Hilman
<khilman@deeprootsystems.com>.
linux-omap source commit is
3b7de4be879f1f4f55ae59882a5cbd80f6dcf0f0.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Peter de Schrijver <peter.de-schrijver@nokia.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:08:44 +0000 (12:08 -0700)]
[ARM] OMAP3 clock: avoid invalid FREQSEL values during DPLL rate rounding
The DPLL FREQSEL jitter correction bits are set based on a table in
the 34xx TRM, Table 4-38, according to the DPLL's internal clock
frequency "Fint." Several Fint frequency ranges are missing from this
table. Previously, we allowed these Fint frequency ranges to be
selected in the rate rounding code, but did not change the FREQSEL bits.
Correspondence with the OMAP hardware team indicates that Fint values
not in the table should not be used. So, prevent them from being
selected during DPLL rate rounding. This removes warnings and also
can prevent the chip from locking up.
The first pass through the rate rounding code will update the DPLL max
and min dividers appropriately, so later rate rounding passes will run
faster than the first.
Peter de Schrijver <peter.de-schrijver@nokia.com> put up with several
test cycles of this patch - thanks Peter.
linux-omap source commit is
f9c1b82f55b60fc39eaa6e7aa1fbe380c0ffe2e9.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Peter de Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:08:41 +0000 (12:08 -0700)]
[ARM] OMAP3 clock: optimize DPLL rate rounding algorithm
The previous DPLL rate rounding algorithm counted the divider (N) down
from the maximum to 1. Since we currently use a broad DPLL rate
tolerance, and lower N values are more power-efficient, we can often
bypass several iterations through the loop by counting N upwards from
1.
Peter de Schrijver <peter.de-schrijver@nokia.com> put up with several
test cycles of this patch - thanks Peter.
linux-omap source commit is
6f6d82bb2f80fa20a841ac3e95a6f44a5a156188.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Peter de Schrijver <peter.de-schrijver@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:08:38 +0000 (12:08 -0700)]
[ARM] OMAP3 clock: remove unnecessary dpll_data dereferences
Remove some clutter from omap2_dpll_round_rate().
linux-omap source commit is
4625dceb8583c02a6d67ededc9f6a8347b6b8cb7.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:08:17 +0000 (12:08 -0700)]
[ARM] OMAP3 clock: convert dpll_data.idlest_bit to idlest_mask
Convert struct dpll_data.idlest_bit field to idlest_mask. Needed since
OMAP2 uses two bits for DPLL IDLEST rather than one.
While here, add the missing idlest_* fields for DPLL3.
linux-omap source commits are
25bab0f176b0a97be18a1b38153f266c3a155784
and
b0f7fd17db2aaf8e6e9a2732ae3f4de0874db01c.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:08:14 +0000 (12:08 -0700)]
[ARM] OMAP3 clock: DPLL{1,2}_FCLK clksel can divide by 4
OMAP34xx ES2 TRM Delta G to H states that the divider for DPLL1_FCLK and
DPLL2_FCLK can divide by 4 in addition to dividing by 1 and 2. Encode this
into the OMAP3 clock framework.
linux-omap source commit is
050684c18f2ea0b08fdd5233a0cd3c7f96e00a0e.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 19:08:11 +0000 (12:08 -0700)]
[ARM] OMAP3 clock: fix DPLL jitter correction and rate programming
Fix DPLL jitter correction programming. Previously,
omap3_noncore_dpll_program() stored the FREQSEL jitter correction
parameter to the wrong register. This caused jitter correction to be set
incorrectly and also caused the DPLL divider to be programmed incorrectly.
Also, fix DPLL divider programming. An off-by-one error existed in
omap3_noncore_dpll_program(), causing DPLLs to be programmed with a higher
divider than intended.
linux-omap source commit is
5c0ec88a2145cdf2f2c9cc5fae49635c4c2476c7.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Jouni Hogander [Wed, 28 Jan 2009 02:44:38 +0000 (19:44 -0700)]
[ARM] OMAP3: PM: Emu_pwrdm is switched off by hardware even when sdti is in use
Using sdti doesn't keep emu_pwrdm on if hardware supervised pwrdm
transitions are used. This causes sdti stop to work when power
management is initialized and hardware supervised pwrdm control is
enabled. This patch disables hardware supervised pwrdm control for
emu_pwrdm. Now emu_pwrdm is switched off on boot by software when it
is not used.
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:44:35 +0000 (19:44 -0700)]
[ARM] OMAP2/3 clockdomains: autodeps should respect platform flags
Fix the clockdomain autodep code to respect omap_chip platform flags.
Resolves "Unable to handle kernel paging request at virtual address
5f75706d" panic during power management initialization on OMAP2.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tomi Valkeinen [Wed, 28 Jan 2009 02:44:31 +0000 (19:44 -0700)]
[ARM] OMAP: wait for pwrdm transition after clk_enable()
Enabling clock in a disabled power domain causes the power domain to be
turned on. However, the power transition is not always finished when
clk_enable() returns and this randomly crashes the kernel when an
interrupt happens right after the clk_enable, and the kernel tries to
read the irq status register for that domain.
Why the irq status register is inaccessible, I don't know. Also it
doesn't seem to be related to the module being not powered up, but to
the transition itself.
The same could perhaps happen after clk_disable also, but I have not
witnessed that.
The problem affects at least dss, cam and sgx clocks.
This change waits for the transition to be finished before returning
from omap2_clkdm_clk_enable().
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:44:28 +0000 (19:44 -0700)]
[ARM] OMAP3 powerdomains: remove RET from SGX power states list
The SGX device on OMAP3 does not support retention, so remove RET from the
list of possible SGX power states. Problem debugged by Richard Woodruff
<r-woodruff2@ti.com>.
Signed-off-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:44:18 +0000 (19:44 -0700)]
[ARM] OMAP3 PRCM: add DPLL1-5 powerdomains, clockdomains; mark clocks
Each DPLL exists in its own powerdomain (cf 34xx TRM figure 4-18) and
clockdomain; so, create powerdomain and clockdomain structures for them.
Mark each DPLL clock as belonging to their respective DPLL clockdomain.
cf. 34xx TRM Table 4-27 (among other references).
linux-omap source commits are
acdb615850b9b4f7d1ab68133a16be8c8c0e7419 and
a8798a48f33e9268dcc7f30a4b4a3ce4220fe0c9.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Thu, 8 May 2008 01:19:07 +0000 (19:19 -0600)]
[ARM] OMAP3 clock: move sys_clkout2 clk to core_clkdm
sys_clkout2 belongs in the core_clkdm (3430 TRM section 4.7.2.2).
It's not clear whether it actually is in the CORE clockdomain, or whether
it is technically in a different clockdomain; but this is closer to
reality than the present configuration.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 10 Sep 2008 16:47:36 +0000 (10:47 -0600)]
[ARM] OMAP2/3 clockdomains: add CM and PRM clkdms
Add clockdomains for the CM and PRM. These will ultimately replace the
"wkup_clkdm", which appears to not actually exist on the hardware.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Tue, 3 Feb 2009 09:10:03 +0000 (02:10 -0700)]
[ARM] OMAP2/3 clockdomains: combine pwrdm, pwrdm_name into union in struct clockdomain
struct clockdomain contains a struct powerdomain *pwrdm and const char
*pwrdm_name. The pwrdm_name is only used at initialization to look up
the appropriate pwrdm pointer. Combining these into a union saves
about 100 bytes on 3430SDP. This patch should not cause any change in
kernel function.
Updated to gracefully handle autodeps that contain invalid powerdomains,
per Russell King's review comments.
Boot-tested on BeagleBoard ES2.1.
linux-omap source commit is
718fc6cd4db902aa2242a736cc3feb8744a4c71a.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Kevin Hilman [Wed, 28 Jan 2009 02:13:38 +0000 (19:13 -0700)]
[ARM] OMAP2: Implement CPUfreq frequency table based on PRCM table
This patch adds a CPUfreq frequency-table implementation for OMAP2 by
walking the PRCM rate-table for available entries and adding them to a
CPUfreq table.
CPUfreq can then be used to manage switching between all the available
entries in the PRCM rate table. Either use the CPUfreq sysfs
interface directly, (see Section 3 of Documentation/cpu-freq/user-guide.txt)
or use the cpufrequtils package:
http://www.kernel.org/pub/linux/utils/kernel/cpufreq/cpufrequtils.html
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Updated to try to use cpufreq_table if it exists.
linux-omap source commit is
77ce544fa48deb7a2003f454624e3ca10d37ab87.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:13:12 +0000 (19:13 -0700)]
[ARM] OMAP: Make dpll4_m4_ck programmable with clk_set_rate()
Filling the set_rate and round_rate fields of dpll4_m4_ck makes
this clock programmable through clk_set_rate(). This is needed
to give omapfb control over the dss1_alwon_fck rate.
This patch includes a fix from Tomi Valkeinen <tomi.valkeinen@nokia.com>.
linux-omap source commits are
e42218d45afbc3e654e289e021e6b80c657b16c2 and
9d211b761b3cdf7736602ecf7e68f8a298c13278.
Signed-off-by: Måns Rullgård <mans@mansr.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Sergio Aguirre [Wed, 28 Jan 2009 02:13:09 +0000 (19:13 -0700)]
[ARM] OMAP: Add CSI2 clock struct for handling it with clock API
Add CSI2 clock struct for handling it with clock API when TI PM is disabled.
linux-omap source commit is
8b20f4498928459276bd3366e3381ad595d23432.
Signed-off-by: Sergio Aguirre <saaguirre@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Daniel Stone [Wed, 28 Jan 2009 02:13:05 +0000 (19:13 -0700)]
[ARM] OMAP2: Fix definition of SGX clock register bits
The GFX/SGX functional and interface clocks have different masks, for
some unknown reason, so split EN_SGX_SHIFT into one each for fclk and
iclk.
Correct according to the TRM and the far more important 'does this
actually work at all?' metric.
linux-omap source commit is
de1121fdb899f762b9e717f44eaf3fae7c00cd3e.
Signed-off-by: Daniel Stone <daniel.stone@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:13:02 +0000 (19:13 -0700)]
[ARM] OMAP3 clock: fix 96MHz clocks
Fix some bugs in the OMAP3 clock tree pertaining to the 96MHz clocks.
The 96MHz portion of the clock tree should now have reasonable
fidelity to the 34xx TRM Rev I.
One remaining question mark: it's not clear exactly which 96MHz source
clock the USIM uses. This patch sticks with the previous setting, which
seems reasonable.
linux-omap source commit is
15c706e8179ce238c3ba70a25846a36b73bd2359.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:12:57 +0000 (19:12 -0700)]
[ARM] OMAP3: move USBHOST SAR handling from clock framework to powerdomain layer
Remove usbhost_sar_fclk from the OMAP3 clock framework. The bit that
the clock was tweaking doesn't actually enable or disable a clock; it
controls whether the hardware will save and restore USBHOST state
when the powerdomain changes state. (That happens to coincidentally
enable a clock for the duration of the operation, hence the earlier
confusion.)
In place of the clock, mark the USBHOST powerdomain as supporting
hardware save-and-restore functionality.
linux-omap source commit is
f3ceac86a9d425d101d606d87a5af44afef27179.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:12:54 +0000 (19:12 -0700)]
[ARM] OMAP24xx clock: add missing SSI L4 interface clock
This patch adds a missing OMAP24xx clock, the SSI L4 interface clock,
as "ssi_l4_ick".
linux-omap source commit is
ace129d39b3107d330d4cf6934385d13521f2fec.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:12:50 +0000 (19:12 -0700)]
[ARM] OMAP: Fix sparse, checkpatch warnings in OMAP2/3 PRCM/PM code
Fix sparse & checkpatch warnings in OMAP2/3 PRCM & PM code. This mostly
consists of:
- converting pointer comparisons to integers in form similar to
(ptr == 0) to the standard idiom (!ptr)
- labeling a few non-static private functions as static
- adding prototypes for *_init() functions in the appropriate header
files, and getting rid of the corresponding open-coded extern
prototypes in other C files
- renaming the variable 'sclk' in mach-omap2/clock.c:omap2_get_apll_clkin
to avoid shadowing an earlier declaration
Clean up checkpatch issues. This mostly involves:
- converting some asm/ includes to linux/ includes
- cleaning up some whitespace
- getting rid of braces for conditionals with single following statements
Also take care of a few odds and ends, including:
- getting rid of unlikely() and likely() - none of this code is particularly
fast-path code, so the performance impact seems slim; and some of those
likely() and unlikely() indicators are probably not as accurate as the
ARM's branch predictor
- removing some superfluous casts
linux-omap source commit is
347df59f5d20fdf905afbc26b1328b0e28a8a01b.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Paul Walmsley [Wed, 28 Jan 2009 02:12:47 +0000 (19:12 -0700)]
[ARM] OMAP2/3: Add non-CORE DPLL rate set code and M, N programming
Add non-CORE DPLL rate set code and M,N programming for OMAP3.
Connect it to OMAP34xx DPLLs 1, 2, 4, 5 via the clock framework.
You may see some warnings on rate sets from the freqsel code. The
table that TI presented in the 3430 TRM Rev F does not cover Fint <
750000, which definitely occurs in practice. However, the lack of this
freqsel case does not appear to impair the DPLL rate change.
linux-omap source commit is
689fe67c6d1ad8f52f7f7b139a3274b79bf3e784.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Wed, 28 Jan 2009 10:22:50 +0000 (10:22 +0000)]
[ARM] omap: hsmmc: new short connection id names
... rather than the clock names themselves.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sat, 24 Jan 2009 16:27:06 +0000 (16:27 +0000)]
[ARM] omap: omap24xxcam: use short connection IDs for omap2 clocks
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 20:58:56 +0000 (20:58 +0000)]
[ARM] omap: convert omap RNG clocks to match by devid and conid
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 22 Jan 2009 19:41:20 +0000 (19:41 +0000)]
[ARM] omap: spi: arrange for omap_uwire to use connection ID
... which now means no driver requests the "armxor_ck" clock directly.
Also, fix the error handling for clk_get(), ensuring that we propagate
the error returned from clk_get().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 22 Jan 2009 10:12:04 +0000 (10:12 +0000)]
[ARM] omap: w1: convert omap HDQ clocks to match by devid and conid
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Fri, 23 Jan 2009 22:57:12 +0000 (22:57 +0000)]
[ARM] omap: i2c: remove conditional ick clocks
By providing a dummy ick for OMAP1510 and OMAP310, we avoid having
SoC conditional clock information in i2c-omap.c. Also, fix the
error handling by making sure we propagate the error returned via
clk_get().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 22 Jan 2009 19:31:46 +0000 (19:31 +0000)]
[ARM] omap: i2c: remove armxor_ck
On OMAP1, the I2C functional clock (fck) is the armxor_ck, so there's
no need to get "armxor_ck" separately.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 21:02:29 +0000 (21:02 +0000)]
[ARM] omap: i2c: use short connection ids
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Fri, 23 Jan 2009 10:26:46 +0000 (10:26 +0000)]
[ARM] omap: mcbsp: convert to use fck/ick clocks directly
Rather than introducing a special 'mcbsp_clk' with code behind it in
mach-omap*/mcbsp.c to handle the SoC specifics, arrange for the mcbsp
driver to be like any other driver. mcbsp requests its fck and ick
clocks directly, and the SoC specific code deals with selecting the
correct clock.
There is one oddity to deal with - OMAP1 fiddles with the DSP clocks
and DSP reset, so we move this to the two callback functions.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 20:49:37 +0000 (20:49 +0000)]
[ARM] omap: mcspi: new short connection id names
... rather than the clock names themselves.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Fri, 23 Jan 2009 19:03:37 +0000 (19:03 +0000)]
[ARM] omap: MMC: provide a dummy ick for OMAP1
Eliminate the OMAP1 vs OMAP2 clock knowledge in the MMC driver.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 20:53:30 +0000 (20:53 +0000)]
[ARM] omap: MMC: convert clocks to match by devid and conid
Convert OMAP MMC driver to match clocks using the device ID and a
connection ID rather than a clock name. This allows us to eliminate
the OMAP1/OMAP2 differences for the function clock.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Fri, 23 Jan 2009 12:48:37 +0000 (12:48 +0000)]
[ARM] omap: watchdog: provide a dummy ick for OMAP1
Eliminate the OMAP1 vs OMAP2 clock knowledge in the watchdog driver.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 20:44:33 +0000 (20:44 +0000)]
[ARM] omap: watchdog: convert clocks to match by devid and conid
This eliminates the need for separate OMAP24xx and OMAP34xx clock
requesting code sections.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Fri, 23 Jan 2009 22:34:09 +0000 (22:34 +0000)]
[ARM] omap: provide a dummy clock node
By providing a dummy clock node, we can eliminate the SoC conditional
clock handing in the OMAP drivers, moving this knowledge out of the
driver and into the machine clock support code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 16:28:32 +0000 (16:28 +0000)]
[ARM] omap: remove pre-CLKDEV clk_get/clk_put
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 15:51:11 +0000 (15:51 +0000)]
[ARM] omap: convert OMAP3 to use clkdev
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 15:27:29 +0000 (15:27 +0000)]
[ARM] omap: convert OMAP2 to use clkdev
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sun, 18 Jan 2009 23:03:15 +0000 (23:03 +0000)]
[ARM] omap: convert OMAP1 to use clkdev
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 22 Jan 2009 16:08:04 +0000 (16:08 +0000)]
[ARM] omap: allow double-registering of clocks
This stops things blowing up if a 'struct clk' to be passed more
than once to clk_register(), which will be required when we decouple
struct clk's from their names.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Mon, 19 Jan 2009 18:56:17 +0000 (18:56 +0000)]
[ARM] omap: ensure devname is set for dummy devices
This is needed to use these with the clkdev helpers.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sun, 8 Feb 2009 16:07:46 +0000 (16:07 +0000)]
[ARM] omap: handle RATE_CKCTL via .set_rate/.round_rate methods
It makes no sense to have the CKCTL rate selection implemented as a flag
and a special exception in the top level set_rate/round_rate methods.
Provide CKCTL set_rate/round_rate methods, and use these for where ever
RATE_CKCTL is used and they're not already overridden. This allows us
to remove the RATE_CKCTL flag.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 13 Nov 2008 13:44:15 +0000 (13:44 +0000)]
[ARM] omap: move propagate_rate() calls into generic omap clock code
propagate_rate() is recursive, so it makes sense to minimise the
amount of stack which is used for each recursion. So, rather than
recursing back into it from the ->recalc functions if RATE_PROPAGATES
is set, do that test at the higher level.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 13 Nov 2008 13:07:00 +0000 (13:07 +0000)]
[ARM] omap: remove unnecessary calls to propagate_rate()
We've always called propagate_rate() in the parent function to
the .set_rate methods, so there's no point having the .set_rate
methods also call this heavy-weight function - it's mere
duplication of what's happening elsewhere.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Thu, 13 Nov 2008 13:01:32 +0000 (13:01 +0000)]
[ARM] omap: move clock propagation into core omap clock code
Move the clock propagation calls for set_parent and set_rate into
the core omap clock code, rather than having these calls scattered
throughout the OMAP1 and OMAP2 implementations.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sun, 8 Feb 2009 17:49:22 +0000 (17:49 +0000)]
[ARM] omap: provide a standard clk_get_parent() implementation
which only has to return clk->parent.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Wed, 5 Nov 2008 12:54:04 +0000 (12:54 +0000)]
[ARM] omap: remove clk_deny_idle and clk_allow_idle
Nothing makes any use of these functions, so there's little point in
providing them.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 21:50:46 +0000 (21:50 +0000)]
[ARM] omap: rearrange clock.h structure order
... to eliminate unnecessary padding. We have rather a lot of these
structures, so eliminating unnecessary padding results in a saving of
1488 bytes.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 21:42:54 +0000 (21:42 +0000)]
[ARM] omap: remove clk->owner
clk->owner is always NULL, so its existence doesn't serve any useful
function other than bloating the kernel by 992 bytes. Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 21:24:00 +0000 (21:24 +0000)]
[ARM] omap: don't use clkops_omap2_dflt_wait for non-ICLK/FCLK clocks
The original code in omap2_clk_wait_ready() used to check the low 8
bits to determine whether they were within the FCLKEN or ICLKEN
registers. Specifically, the test is satisfied when these offsets
are used:
CM_FCLKEN, CM_FCLKEN1, CM_CLKEN, OMAP24XX_CM_FCLKEN2, CM_ICLKEN,
CM_ICLKEN1, CM_ICLKEN2, CM_ICLKEN3, OMAP24XX_CM_ICLKEN4
OMAP3430_CM_CLKEN_PLL, OMAP3430ES2_CM_CLKEN2
If one of these offsets isn't used, omap2_clk_wait_ready() merely
returns without doing anything. So we should use the non-wait clkops
version instead and eliminate that conditional.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 18:59:32 +0000 (18:59 +0000)]
[ARM] omap: eliminate unnecessary conditionals in omap2_clk_wait_ready
Rather than employing run-time tests in omap2_clk_wait_ready() to
decide whether we need to wait for the clock to become ready, we
can set the .ops appropriately.
This change deals with the OMAP24xx and OMAP34xx conditionals only.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 17:59:52 +0000 (17:59 +0000)]
[ARM] omap: add default .ops to all remaining OMAP2 clocks
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 16:48:35 +0000 (16:48 +0000)]
[ARM] omap: kill PARENT_CONTROLS_CLOCK
PARENT_CONTROLS_CLOCK just makes enable/disable no-op, and is
functionally an alias for ALWAYS_ENABLED. This can be handled
in the same way, using clkops_null.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 16:35:03 +0000 (16:35 +0000)]
[ARM] omap: provide a NULL clock operations structure
... and use it for clocks which are ALWAYS_ENABLED. These clocks
use a non-NULL enable_reg pointer for other purposes (such as
selecting clock rates.)
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 14:02:46 +0000 (14:02 +0000)]
[ARM] omap: introduce clock operations structure
Collect up all the common enable/disable clock operation functions
into a separate operations structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Tue, 4 Nov 2008 15:10:54 +0000 (15:10 +0000)]
[ARM] omap: remove VIRTUAL_CLOCK
Nothing tests the clock flags for this bit, so it serves no purpose.
Remove it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Russell King [Sun, 1 Feb 2009 17:53:26 +0000 (17:53 +0000)]
Merge branch 'omap-fixes' of git://git./linux/kernel/git/tmlind/linux-omap-2.6
Uwe Kleine-König [Sat, 31 Jan 2009 00:21:59 +0000 (01:21 +0100)]
NVRAM depends on RTC_DRV_CMOS
drivers/char/nvram.c uses rtc_lock, that (on ARM) is only defined if
RTC_DRV_CMOS is enabled.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Uwe Kleine-König [Sat, 31 Jan 2009 00:21:58 +0000 (01:21 +0100)]
rename platform_driver name "flash" to "sa1100-mtd"
"flash" is a very generic name for a platform_driver that is only
available on SA11x0.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Nicolas Pitre <nico@marvell.com>
Uwe Kleine-König [Sat, 31 Jan 2009 00:21:56 +0000 (01:21 +0100)]
annotate that [fp, #-4] is the saved lr
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Uwe Kleine-König [Sat, 31 Jan 2009 00:21:55 +0000 (01:21 +0100)]
Use __SPIN_LOCK_UNLOCKED to initialize bad_irq_desc.lock
SPIN_LOCK_UNLOCKED is deprecated as lockdep cannot properly work with
locks initialized with it.
This fix is necessary to compile the linux-rt tree for ARM.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Steven Rostedt <srostedt@redhat.com>
Kevin Hilman [Thu, 29 Jan 2009 16:57:18 +0000 (08:57 -0800)]
ARM: OMAP: fix fault in enter_full_retention()
In omap24xx_cpu_suspend assembly routine, the r2 register which holds
the address of the SDRC_POWER reg is set to zero before the value is
written back triggering a fault due to writing to address zero.
It's hard to tell where this change was introduced since this file
has been moved and merged.
While this fix prevents a crash, suspend on my n810 is broken with
current kernels. I never come out of suspend.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
김규원 [Thu, 29 Jan 2009 16:57:17 +0000 (08:57 -0800)]
ARM: OMAP: Mask interrupts when disabling interrupts, v2
By Ingo Molnar, interrupts are not masked by default.
(refer to
76d2160147f43f982dfe881404cfde9fd0a9da21)
But if interrupts are not masked, the processor can wake up while in
Suspend-to-RAM state by an external interrupt. For example, if an
OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM
state, it wake up automatically by M_IRQ_92. The disable_irq() function
can't disable the interrupt in H/W level, So I modified
arch/arm/mach-omap2/irq.c
Signed-off-by: Kim Kyuwon <chammoru@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Aaro Koskinen [Thu, 29 Jan 2009 16:57:17 +0000 (08:57 -0800)]
ARM: OMAP: gptimer min_delta_ns corrected
When 32 kHz timer is used the min_delta_ns should be initialized so
that it reflects the timer programming cost. A write to the timer
device will be usually posted, but it takes roughly 3 cycles before
it is effective. If the timer is reprogrammed before that, the CPU
will stall until the previous write completes. This was pointed out by
Richard Woodruff.
Since the lower bound for min_delta_ns is 1000, the change is visible
only with tick rates less than 3 MHz.
Also note that the old value is incorrect for 32 kHz also due to
a rounding error, and it can cause the timer queue to hang (due to
clockevent code trying to program the timer with zero ticks).
Signed-off-by: Aaro Koskinen <Aaro.Koskinen@nokia.com>
Reviewed-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Thu, 29 Jan 2009 16:57:16 +0000 (08:57 -0800)]
ARM: OMAP: Fix hsmmc init, v2
The naming accidentally broke while changing the name for the
driver to not to conflict with the other mmc driver.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tony Lindgren [Thu, 29 Jan 2009 16:57:16 +0000 (08:57 -0800)]
ARM: OMAP: Fix omap34xx revision detection for ES3.1
Fix omap34xx revision detection for ES3.1
Signed-off-by: Tony Lindgren <tony@atomide.com>
Jarkko Nikula [Thu, 29 Jan 2009 16:57:12 +0000 (08:57 -0800)]
ARM: OMAP: DMA: Fix uninitialized channel flags
This has similar symptoms than
66c23551b1b774e2be3c7bdf91c0ebf2c7a3519e
where just omap_request_dma, omap_dma_link_lch and omap_dma_unlink_lch
can cause incorrect dump_stack(). Here it can happen if channel has been
used before and the channel flags variable holds old status.
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Juha Yrjola [Thu, 29 Jan 2009 16:57:12 +0000 (08:57 -0800)]
ARM: OMAP: Fix race in OMAP2/3 DMA IRQ handling
CSR must be cleared before invoking the callback.
If the callback function starts a new, fast DMA transfer on the same
channel, the completion status might lost if CSR is cleared after
the callback invocation.
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Stanley.Miao [Thu, 29 Jan 2009 16:57:12 +0000 (08:57 -0800)]
ARM: OMAP: Fix McBSP spin_lock deadlock
A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.
omap_mcbsp_request()
\- clk_enable(mcbsp->clk) [takes and holds clockfw_lock]
\- omap2_clk_enable()
\- _omap2_clk_enable()
\- omap_mcbsp_clk_enable()
\- clk_enable(child clock) [tries for clockfw_lock again]
mcbsp_clk is a virtual clock and it comprises several child clocks. when
enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk
will enable its child clocks, then the deadlock occurs.
The solution is to remove the virtual clock and enable these child clocks in
omap_mcbsp_request() directly.
Signed-off-by: Stanley.Miao <stanley.miao@windriver.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Linus Torvalds [Wed, 28 Jan 2009 18:49:30 +0000 (10:49 -0800)]
Linux 2.6.29-rc3
Linus Torvalds [Wed, 28 Jan 2009 17:01:42 +0000 (09:01 -0800)]
Merge branch 'merge' of git://git./linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc/mm: Fix handling of _PAGE_COHERENT in BAT setup code
powerpc/pseries: Correct VIO bus accounting problem in CMO env.
powerpc: More printing warning fixes for the l64 to ll64 conversion
powerpc: Remove arch/ppc cruft from Kconfig
powerpc: Printing fix for l64 to ll64 conversion: phyp_dump.c
powerpc/embedded6xx: Update defconfigs
powerpc/8xx: Update defconfigs
powerpc/86xx: Update defconfigs
powerpc/83xx: Update defconfigs
powerpc/85xx: Update defconfigs
powerpc/mpc8313erdb: fix kernel panic because mdio device is not probed
powerpc/4xx: Update multi-board PowerPC 4xx defconfigs
powerpc/44x: Update PowerPC 44x defconfigs
powerpc/40x: Update PowerPC 40x defconfigs
powerpc/85xx: Fix typo in mpc8572ds dts
powerpc/44x: Warp patches for the new NDFC driver
powerpc/4xx: DTS: Add Add'l SDRAM0 Compatible and Interrupt Info
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