Tom Tromey [Thu, 30 Sep 2010 17:51:39 +0000 (17:51 +0000)]
gdb
* completer.c (count_struct_fields): Handle anonymous structs and
unions.
(add_struct_fields): Likewise.
gdb/testsuite
* gdb.base/completion.exp: Test completion through anonymous
union.
* gdb.base/break1.c (struct some_struct): Add anonymous union.
Pierre Muller [Thu, 30 Sep 2010 16:02:35 +0000 (16:02 +0000)]
* s390-mkopc.c (main): Exit with error 1 if sscanf fails
to parse all 6 parameters.
Pierre Muller [Thu, 30 Sep 2010 11:32:15 +0000 (11:32 +0000)]
* s390-mkopc.c (main): Change description array size to 80.
Add maximum length of 79 to description parsing.
Jan Kratochvil [Thu, 30 Sep 2010 10:29:00 +0000 (10:29 +0000)]
gdb/
Fix printing parameters of inlined functions.
* ada-lang.c (is_known_support_routine)
(ada_unhandled_exception_name_addr_from_raise): Provide NULL parameter
for find_frame_funname.
* python/py-frame.c (frapy_name): Likewise.
* stack.c (find_frame_funname): New parameter funcp. Update the
function comment. Fill it in.
(print_frame): New variable func. Initialize it by
find_frame_funname. Print arguments only if FUNC is not NULL. Use
FUNC as the parameter of print_args_stub.
* stack.h (find_frame_funname): New parameter funcp. Remove the
function declaration comment.
gdb/testsuite/
Fix printing parameters of inlined functions.
* gdb.dwarf2/dw2-inline-param.exp: New file.
* gdb.dwarf2/dw2-inline-param-main.c: New file.
* gdb.dwarf2/dw2-inline-param.S: New file.
Jan Kratochvil [Thu, 30 Sep 2010 10:24:40 +0000 (10:24 +0000)]
gdb/
PR corefiles/12071.
* inferior.c (have_live_inferiors): New variables old_chain, inf and
tp. Iterate INFERIOR_LIST and call target_has_execution.
gdb/testsuite/
PR corefiles/12071.
* gdb.base/corefile.exp (quit with a process, no question: load core)
(quit with a core file): New tests.
Doug Kwan [Thu, 30 Sep 2010 08:12:40 +0000 (08:12 +0000)]
2010-09-30 Doug Kwan <dougkwan@google.com>
* gold/testsuite/arm_branch_out_of_range.sh: Fix broken tests.
Kevin Buettner [Thu, 30 Sep 2010 00:03:23 +0000 (00:03 +0000)]
* mem.c (rx_mem_ptr): When invalidating the decode cache, account
for the fact that the instruction decoder never uses swapped
addresses.
gdbadmin [Thu, 30 Sep 2010 00:01:03 +0000 (00:01 +0000)]
*** empty log message ***
Alan Modra [Thu, 30 Sep 2010 00:00:05 +0000 (00:00 +0000)]
daily update
Jan Kratochvil [Wed, 29 Sep 2010 22:32:52 +0000 (22:32 +0000)]
gdb/
Fix GDB crash on inferior calls with self-referencing classes.
* gnu-v3-abi.c (gnuv3_pass_by_reference): Do not call itself on static
member fields.
gdb/testsuite/
Fix GDB crash on inferior calls with self-referencing classes.
* gdb.dwarf2/dw2-cp-infcall-ref-static.exp: New file.
* gdb.dwarf2/dw2-cp-infcall-ref-static-main.c: New file.
* gdb.dwarf2/dw2-cp-infcall-ref-static.S: New file.
Doug Evans [Wed, 29 Sep 2010 16:41:24 +0000 (16:41 +0000)]
Workaround for gcc/45682.
* dwarf2read.c (partial_die_info): New fields fixup_called,
linkage_name.
(guess_partial_die_structure_name): Renamed from guess_structure_name.
Move definition next to use. Use linkage_name to determine if class
is in a namespace. All callers updated.
(fixup_partial_die): Return early if already called.
Set fixup_called when done.
(guess_full_die_structure_name): New function.
(determine_prefix): Call it for class/struct/union dies if c++ and
.debug_types section is present and parent is DW_TAG_compile_unit.
Nick Clifton [Wed, 29 Sep 2010 15:47:45 +0000 (15:47 +0000)]
* rx.c (decode_opcode: RXO_int): Only break out of the emulation
loop if rx_syscall() does not return a RX_STEPPED result.
Bernd Schmidt [Wed, 29 Sep 2010 10:14:02 +0000 (10:14 +0000)]
include/
* opcode/tic6x-control-registers.h (tscl): Now read_write.
gas/testsuite/
* gas/tic6x/insns-bad-1.s: Remove test for readonly tscl.
* gas/tic6x/insns-bad-1.l: Likewise.
* gas/tic6x/insns-c674x.d: Add test for writeable tscl.
* gas/tic6x/insns-c674x.s: Likewise.
Alan Modra [Wed, 29 Sep 2010 06:49:33 +0000 (06:49 +0000)]
* gas/all/fwdexp.d, * gas/all/fwdexp.s: New test.
* gas/all/gas.exp: Run it.
Alan Modra [Wed, 29 Sep 2010 06:48:30 +0000 (06:48 +0000)]
* expr.c (expr): Correct returned segment value.
Alan Modra [Wed, 29 Sep 2010 06:20:06 +0000 (06:20 +0000)]
* ld-h8300/h8300.exp: Use is_elf_format.
Alan Modra [Wed, 29 Sep 2010 06:17:12 +0000 (06:17 +0000)]
* ldlang.c (lang_place_orphans): Zero vma when relocatable or non-load
section for orphans handled here.
Alan Modra [Wed, 29 Sep 2010 06:06:00 +0000 (06:06 +0000)]
* lib/ld-lib.exp (is_elf_format): Merge with binutils and gas versions.
(is_aout_format): Update target list.
(is_pecoff_format): Remove unnecessary line continuation.
Alan Modra [Wed, 29 Sep 2010 06:05:16 +0000 (06:05 +0000)]
* lib/gas-defs.exp (is_elf_format): Merge with binutils and ld versions.
(is_aout_format): Copy from ld testsuite.
(is_pecoff_format): Merge with ld version.
Alan Modra [Wed, 29 Sep 2010 06:04:40 +0000 (06:04 +0000)]
* lib/utils-lib.exp (is_elf_format): Merge with gas and ld versions.
gdbadmin [Wed, 29 Sep 2010 00:00:33 +0000 (00:00 +0000)]
*** empty log message ***
Alan Modra [Wed, 29 Sep 2010 00:00:05 +0000 (00:00 +0000)]
daily update
Joel Brobecker [Tue, 28 Sep 2010 21:46:09 +0000 (21:46 +0000)]
Add a sparc simulator with the sparc bareboard target.
gdb/ChangeLog:
* configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
(sparc-*-rtems*): Delete, now redundant with the sparc-*-* case.
Joel Brobecker [Tue, 28 Sep 2010 21:40:23 +0000 (21:40 +0000)]
[doco] document support for Ravenscar profile
This announces the support for debugging Ada programs using
the Ravenscar Profile, as well as documents the new commands
introduced as part of this effort.
gdb/ChangeLog:
* NEWS: Announce Ravenscar Profile support.
gdb/doc/ChangeLog:
* gdb.texinfo (Ravenscar Profile): New node.
Joel Brobecker [Tue, 28 Sep 2010 21:39:31 +0000 (21:39 +0000)]
Add support for GNAT Ravenscar run-time library.
gdb/ChangeLog (Jerome Guitton, Joel Brobecker):
* ravenscar-thread.c, ravenscar-thread.h, ravenscar-sparc-thread.c:
New files.
* configure.tgt (sparc-*-*): Add ravenscar-thread.o and
ravenscar-sparc-thread.o to gdb_target_obs.
Joel Brobecker [Tue, 28 Sep 2010 21:39:03 +0000 (21:39 +0000)]
[Ada] Add ada-tasks.c:iterate_over_live_ada_tasks
This new function is needed by the ravenscar-thread layer.
gdb/ChangeLog:
* ada-tasks.c (iterate_over_live_ada_tasks): New function.
* ada-lang.h (iterate_over_live_ada_tasks): Declare.
Sriraman Tallam [Tue, 28 Sep 2010 17:14:15 +0000 (17:14 +0000)]
2010-09-28 Sriraman Tallam <tmsriram@google.com>
* target.h (Target::can_icf_inline_merge_sections): New virtual
function.
* x86_64.cc (Target__x86_64::can_icf_inline_merge_sections): New
virtual function.
* i386.cc (Target_i386::can_icf_inline_merge_sections): New
virtual function.
* icf.cc (get_section_contents): Inline merge sections only when
target allows it.
gdbadmin [Tue, 28 Sep 2010 00:00:33 +0000 (00:00 +0000)]
*** empty log message ***
Alan Modra [Tue, 28 Sep 2010 00:00:06 +0000 (00:00 +0000)]
daily update
Pierre Muller [Mon, 27 Sep 2010 22:05:40 +0000 (22:05 +0000)]
* amd64-windows-tdep.c (amd64_skip_main_prologue): New function.
(amd64_windows_init_abi): Register amd64_skip_main_prologue as gdbarch
skip_main_prologue method.
DJ Delorie [Mon, 27 Sep 2010 21:01:18 +0000 (21:01 +0000)]
merge from gcc
Ralf Wildenhues [Mon, 27 Sep 2010 20:23:01 +0000 (20:23 +0000)]
Fix unportable shell quoting.
/:
Sync from GCC:
PR bootstrap/44621
* configure.ac: Fix unportable shell quoting.
* configure: Regenerate.
config/:
* po.m4 (AM_PO_SUBDIRS): Fix unportable shell quoting.
bfd/:
* configure: Regenerate.
gas/:
* configure: Regenerate.
gold/:
* configure: Regenerate.
intl/:
* configure: Regenerate.
ld/:
* configure: Regenerate.
opcodes/:
* configure: Regenerate.
binutils/:
* configure: Regenerate.
gprof/:
* configure: Regenerate.
Tom Tromey [Mon, 27 Sep 2010 18:42:36 +0000 (18:42 +0000)]
* dwarf2read.c (dwarf2_read_index): Only allow version 3.
(write_psymbols): Add 'psyms_seen' and 'is_static' arguments.
Only emit a given psymbol once.
(struct signatured_type_index_data) <psyms_seen>: New field.
(write_one_signatured_type): Update.
(cleanup_htab): New function.
(write_psymtabs_to_index): Update. Create psyms_seen hash. Bump
version to 3.
(save_gdb_index_command): Update index documentation.
Tom Tromey [Mon, 27 Sep 2010 17:41:36 +0000 (17:41 +0000)]
* bcache.c (expand_hash_table): Use hash_function, not hash.
Tom Tromey [Mon, 27 Sep 2010 17:28:50 +0000 (17:28 +0000)]
* gdb_wchar.h: Change minimum libiconv to 0x108.
Bernd Schmidt [Mon, 27 Sep 2010 15:52:40 +0000 (15:52 +0000)]
gas/
* config/tc-tic6x.c (tic6x_fix_adjustable): New function.
* config/tc-tic6x.h (tic6x_fix_adjustable): Declare.
(tc_fix_adjustable): New macro.
gas/testsuite/
* gas/tic6x/got-reloc.s: New test.
* gas/tic6x/got-reloc.d: New test.
Andreas Krebbel [Mon, 27 Sep 2010 13:36:48 +0000 (13:36 +0000)]
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
(main): Recognize the new CPU string.
* s390-opc.c: Add new instruction formats and masks.
* s390-opc.txt: Add new z196 instructions.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c: (md_parse_option): New option -march=z196.
* doc/c-s390.texi: Document new option.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run the zarch-z196 test.
* gas/s390/zarch-z196.d: Add new instructions.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
Andreas Krebbel [Mon, 27 Sep 2010 13:33:00 +0000 (13:33 +0000)]
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* s390-dis.c (print_insn_s390): Pick instruction with most
specific mask.
* s390-opc.c: Add unused bits to the insn mask.
* s390-opc.txt: Reorder some instructions to prefer more recent
versions.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Adjust serveral instructions.
* gas/s390/esa-reloc.d: Likewise.
* gas/s390/esa-z990.d: Likewise.
* gas/s390/zarch-reloc.d: Likewise.
* gas/s390/zarch-z10.d: Likewise.
* gas/s390/zarch-z9-ec.d: Likewise.
* gas/s390/zarch-z900.d: Likewise.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* ld-s390/tlsbin.dd: bcr 0,%r7 -> nopr %r7.
* ld-s390/tlsbin_64.dd: Likewise.
* ld-s390/tlspic.dd: Likewise.
* ld-s390/tlspic_64.dd: Likewise.
Matthew Gretton-Dann [Mon, 27 Sep 2010 09:47:05 +0000 (09:47 +0000)]
2010-09-27 Tejas Belagod <tejas.belagod@arm.com>
* gas/config/tc-arm.c (do_neon_ldr_str): Deprecate ARM-mode PC-relative
VSTR, issue an error in THUMB mode.
* opcodes/arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
correction to unaligned PCs while printing comment.
* gas/testsuite/gas/arm/vldr.s: New test for pc-relative VLDR disassembly comment.
* gas/testsuite/gas/arm/vldr.d: Likewise.
* gas/testsuite/gas/arm/vstr-bad.s: New test for PC-relative VSTR.
* gas/testsuite/gas/arm/vstr-thumb-bad.l: Likewise.
* gas/testsuite/gas/arm/vstr-thumb-bad.d: Likewise.
* gas/testsuite/gas/arm/vstr-arm-bad.l: Likewise.
* gas/testsuite/gas/arm/vstr-arm-bad.d: Likewise.
gdbadmin [Mon, 27 Sep 2010 00:00:33 +0000 (00:00 +0000)]
*** empty log message ***
Alan Modra [Mon, 27 Sep 2010 00:00:05 +0000 (00:00 +0000)]
daily update
gdbadmin [Sun, 26 Sep 2010 00:00:33 +0000 (00:00 +0000)]
*** empty log message ***
Alan Modra [Sun, 26 Sep 2010 00:00:05 +0000 (00:00 +0000)]
daily update
gdbadmin [Sat, 25 Sep 2010 00:00:33 +0000 (00:00 +0000)]
*** empty log message ***
Alan Modra [Sat, 25 Sep 2010 00:00:05 +0000 (00:00 +0000)]
daily update
Jan Kratochvil [Fri, 24 Sep 2010 18:35:28 +0000 (18:35 +0000)]
gdb/
Fix lost siginfo_t for inferior calls.
* infrun.c
(struct inferior_thread_state) <siginfo_gdbarch, siginfo_data>: New.
(save_inferior_thread_state): New variables regcache, gdbarch and
siginfo_data. Initialize SIGINFO_DATA if gdbarch_get_siginfo_type_p.
Move INF_STATE allocation later, pre-clear it. Initialize REGISTERS
using REGCACHE.
(restore_inferior_thread_state): New variables regcache and gdbarch.
Restore SIGINFO_DATA for matching GDBARCH. Restore REGISTERS using
REGCACHE. Free also SIGINFO_DATA.
gdb/testsuite/
Fix lost siginfo_t for inferior calls.
* gdb.base/siginfo-infcall.exp: New file.
* gdb.base/siginfo-infcall.c: New file.
Tom Tromey [Fri, 24 Sep 2010 16:11:46 +0000 (16:11 +0000)]
* dwarf2read.c (dw2_expand_symtabs_matching): Add missing
MAYBE_SWAPs.
(dw2_map_symbol_names): Likewise.
Sami Wagiaalla [Fri, 24 Sep 2010 14:47:53 +0000 (14:47 +0000)]
Fix find_oload_champ_namespace_loop memory leak.
2010-09-24 Sami Wagiaalla <swagiaal@redhat.com>
* valops.c (find_oload_champ_namespace_loop): replace incorrect
discard_cleanups do_cleanups.
Pedro Alves [Fri, 24 Sep 2010 13:44:01 +0000 (13:44 +0000)]
PR gdb/11842
gdb/
* amd64-linux-nat.c (compat_siginfo_from_siginfo)
(siginfo_from_compat_siginfo): Also copy si_pid and si_uid when
si_code is < 0. Check for si_code == SI_TIMER before checking for
si_code < 0.
gdb/gdbserver/
* linux-x86-low.c (compat_siginfo_from_siginfo)
(siginfo_from_compat_siginfo): Also copy si_pid and si_uid when
si_code is < 0. Check for si_code == SI_TIMER before checking for
si_code < 0.
Pedro Alves [Fri, 24 Sep 2010 13:41:43 +0000 (13:41 +0000)]
gdb/
* amd64-linux-nat.c (compat_siginfo_from_siginfo)
(siginfo_from_compat_siginfo): Also copy si_pid and si_uid when
si_code is < 0. Check for si_code == SI_TIMER before checking for
si_code < 0.
gdb/gdbserver/
* linux-x86-low.c (compat_siginfo_from_siginfo)
(siginfo_from_compat_siginfo): Also copy si_pid and si_uid when
si_code is < 0. Check for si_code == SI_TIMER before checking for
si_code < 0.
Thomas Schwinge [Fri, 24 Sep 2010 12:14:26 +0000 (12:14 +0000)]
2010-09-24 Thomas Schwinge <thomas@codesourcery.com>
* elf32-arm.c, elf32-cris.c, elf32-hppa.c, elf32-i370.c, elf32-m32r.c,
elf32-m68k.c, elf32-microblaze.c, elf32-ppc.c, elf32-score.c,
elf32-score7.c, elf32-sh.c, elf32-vax.c, elf32-xtensa.c, elf64-alpha.c,
elf64-hppa.c, elf64-mips.c, elf64-ppc.c, elf64-sparc.c, elfcode.h,
elflink.c, elfxx-ia64.c, elfxx-mips.c: Use STN_UNDEF when referring to
the zero symbol index.
Thomas Schwinge [Fri, 24 Sep 2010 11:59:19 +0000 (11:59 +0000)]
2010-09-24 Thomas Schwinge <thomas@codesourcery.com>
* elflink.c (bfd_elf_reloc_symbol_deleted_p): Compare the symbol index
to STN_UNDEF, not SHN_UNDEF.
Pedro Alves [Fri, 24 Sep 2010 11:15:55 +0000 (11:15 +0000)]
* objfiles.h (ALL_OBJSECTIONS): Handle breaks in the inner loop.
H.J. Lu [Fri, 24 Sep 2010 06:09:31 +0000 (06:09 +0000)]
Remove GOTOFF in ld-i386/nogot1.s.
2010-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/11812
* ld-i386/nogot1.s: Don't use GOTOFF.
Kevin Buettner [Fri, 24 Sep 2010 05:18:23 +0000 (05:18 +0000)]
* rx.c (decode_opcode): Add cycle information for RXO_smovu.
Kevin Buettner [Fri, 24 Sep 2010 04:45:08 +0000 (04:45 +0000)]
Fix typo in ChangeLog entry.
Dave Korn [Fri, 24 Sep 2010 04:41:12 +0000 (04:41 +0000)]
* scripttempl/armcoff.sc: Revert 2010-09-22 change.
gdbadmin [Fri, 24 Sep 2010 00:00:33 +0000 (00:00 +0000)]
*** empty log message ***
Alan Modra [Fri, 24 Sep 2010 00:00:05 +0000 (00:00 +0000)]
daily update
Kevin Buettner [Thu, 23 Sep 2010 23:42:53 +0000 (23:42 +0000)]
* cpu.h (reset_decoder): Declare.
* load.c (rx_load): Call `reset_decoder'.
* rx.c (reset_decoder): New function.
Kevin Buettner [Thu, 23 Sep 2010 23:26:42 +0000 (23:26 +0000)]
* rx.c (decode_opcode): Declare `rx' as unsigned.
Kevin Buettner [Thu, 23 Sep 2010 23:05:28 +0000 (23:05 +0000)]
* fpu.c, gdb-if.c, load.c, misc.c, syscalls.c (config.h): Include.
Bernd Schmidt [Thu, 23 Sep 2010 16:16:38 +0000 (16:16 +0000)]
bfd/
* elf32-tic6x.c (elf32_tic6x_fake_sections): New function.
(elf_backend_fake_sections): Define.
ld/testsuite/
* ld-tic6x/pcrel-reloc-local-r-rel-rela.d: New test.
Matthew Gretton-Dann [Thu, 23 Sep 2010 15:52:19 +0000 (15:52 +0000)]
* bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.
* gas/config/tc-arm.c (arm_ext_virt): New variable.
(arm_reg_type): Add REG_TYPE_RNB for banked registers.
(reg_entry): Allow registers to be larger than a byte.
(reg_alias): Fix type warning.
(parse_operands): Parse banked registers when appropriate.
(do_mrs): Add support for Virtualization Extensions.
(do_hvc): New function.
(do_t_mrs): Add support for Virtualization Extensions.
(do_t_msr): Likewise.
(do_t_hvc): New function.
(SPLRBANK): New define.
(reg_names): Add banked registers.
(insns): Add support for Virtualization Extensions.
(md_apply_fixup): Likewise.
(arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions.
(arm_extensions): Add 'virt' extension.
(aeabi_set_public_attributes): Add support for Virtualization
Extensions.
* gas/doc/c-arm.texi: Document 'virt' extension.
* gas/testsuite/gas/arm/armv7-a+virt.d: New test.
* gas/testsuite/gas/arm/armv7-a+virt.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test.
* gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
* include/opcode/arm.h (ARM_EXT_VIRT): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
Extensions.
* opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
(thumb32_opcodes): Likewise.
(banked_regname): New function.
(print_insn_arm): Add Virtualization Extensions support.
(print_insn_thumb32): Likewise.
Matthew Gretton-Dann [Thu, 23 Sep 2010 15:37:45 +0000 (15:37 +0000)]
* gas/config/tc-arm.c (arm_ext_adiv): New variable.
(do_div): New function.
(insns): Accept UDIV and SDIV in ARM state.
(arm_cpus): The cortex-a15 option has all current v7-A extensions.
(arm_extensions): Add 'idiv' extension.
(aeabi_set_public_attributes): Update Tag_DIV_use values for the
Integer Divide extension.
* gas/doc/c-arm.texi: Document the idiv extension.
* gas/testsuite/gas/arm/armv7-a+idiv.d: New test.
* gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test.
* include/opcode/arm.h (ARM_AEXT_ADIV): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
ARM state.
Matthew Gretton-Dann [Thu, 23 Sep 2010 15:31:34 +0000 (15:31 +0000)]
* config/tc-arm.c (arm_ext_v6m): New variable.
(arm_ext_m): Add support for OS extension.
(arm_ext_os): New variable.
(do_t_swi): In v6-M ensure we have the OS extension.
(arm_cpus): The cortex-m1 and cortex-m0 options have the OS
extension by default.
(arm_archs): Add armv6s-m.
(arm_extensions): Add 'os' extension.
(cpu_arch_ver): Add support for v6S-M.
* gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m
architecture options.
* gas/testsuite/gas/arm/archv6s-m-bad.d: New test.
* gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise.
* gas/testsuite/gas/arm/archv6s-m.d: Likewise.
* gas/testsuite/gas/arm/archv6s-m.s: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* include/opcode/arm.h (ARM_EXT_OS): New define.
(ARM_AEXT_V6SM): Likewise.
(ARM_ARCH_V6SM): Likewise.
Matthew Gretton-Dann [Thu, 23 Sep 2010 15:26:24 +0000 (15:26 +0000)]
* gas/config/tc-arm.c (arm_ext_v6z): Remove.
(arm_ext_sec): New variable.
(do_t_smc): In Thumb state SMC requires v7-A.
(insns): Make SMC depend on Security Extensions.
(arm_cpus): All -mcpu=cortex-a* options have the Security Extensions.
(arm_extensions): Add 'sec' extension.
(cpu_arch_ver): Reorder.
(aeabi_set_public_attributes): Emit Tag_Virtualization_use as
appropriate.
* gas/doc/c-arm.texi: Document Security Extensions.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions..
* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test.
* gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions.
* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test.
* gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions.
* gas/testsuite/gas/arm/thumb32.d: Likewise.
* gas/testsuite/gas/arm/thumb32.s: Likewise.
* include/opcode/arm.h (ARM_EXT_V6Z): Remove.
(ARM_EXT_SEC): New define.
(ARM_AEXT_V6Z): Use Security Extensions.
(ARM_AEXT_V6ZK): Likeiwse.
(ARM_AEXT_V6ZT2): Likewise.
(ARM_AEXT_V6ZKT2): Likewise.
(ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions.
(ARM_ARCH_V7A_SEC): New define.
(ARM_ARCH_V7A_MP): Rename...
(ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions.
* ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions.
(thumb32_opcodes): Likewise.
Matthew Gretton-Dann [Thu, 23 Sep 2010 15:18:19 +0000 (15:18 +0000)]
* gas/config/tc-arm.c (arm_ext_mp): Add.
(do_pld): Update comment.
(insns): Add support for pldw.
(arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support
MP extension.
(arm_extensions): Add 'mp' extension.
(aeabi_set_public_attributes): Emit correct build attribute when
MP extension is enabled.
* gas/doc/c-arm.texi: Update for MP extensions.
* gas/testsuite/gas/arm/arch7a-mp.d: Add.
* gas/testsuite/gas/arm/arch7ar-mp.s: Likewise.
* gas/testsuite/gas/arm/arch7r-mp.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add.
* gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise.
* include/opcode/arm.h (ARM_EXT_MP): Add.
(ARM_ARCH_V7A_MP): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add support for pldw.
(thumb32_opcodes): Likewise.
Matthew Gretton-Dann [Thu, 23 Sep 2010 15:11:56 +0000 (15:11 +0000)]
* gas/config/tc-arm.c (md_pseduo_table): Add .arch_extension directive.
(arm_option_extension_value_table): Add.
(arm_extensions): Change type.
(arm_option_cpu_table): Rename...
(arm_option_fpu_table): ...to this.
(arm_fpus): Change type.
(arm_parse_extension): Enforce alphabetical order. Allow
extensions to be removed.
(arm_parse_arch): Allow extensions to be specified with -march.
(s_arm_arch_extension): Add.
(s_arm_fpu): Update for type changes.
* gas/doc/c-arm.texi: Document changes to infrastructure.
Alan Modra [Thu, 23 Sep 2010 12:24:41 +0000 (12:24 +0000)]
* ld-elf/elf.exp: Don't run --gc-sections tls var test on v850.
* ld-elf/group2.d: xfail xstormy.
* ld-elf/group4.d: Likewise.
* ld-elf/group5.d: Likewise.
* ld-elf/group6.d: Likewise.
* ld-elf/init-fini-arrays.d: xfail cr16 and crx.
* ld-elf/orphan2.d: xfail xstormy.
* ld-elf/sec64k.exp: Don't run on targets using generic linker.
Allow a larger range for ld -r expected bar_1 section. Don't run
final link test on a number of targets. Select avr6 for avr targets.
* ld-elfcomm/elfcomm.exp: Don't attempt on hpux.
Alan Modra [Thu, 23 Sep 2010 12:15:55 +0000 (12:15 +0000)]
* gas/all/gas.exp: Update "forward" and "redef3" xfails.
* gas/m68k/all.exp: Don't xfail pcrel on uclinux.
* gas/sh/arch/arch.exp: Don't pass dashes to send_log.
Alan Modra [Thu, 23 Sep 2010 12:11:31 +0000 (12:11 +0000)]
* config/tc-mn10300.c (tc_gen_reloc): Replace absolute symbols
with the absolute section symbol.
Alan Modra [Thu, 23 Sep 2010 12:04:37 +0000 (12:04 +0000)]
* binutils-all/ar.exp: Don't run unique_symbol on msp or hpux.
* binutils-all/copy-2.d: Update not-target list.
* binutils-all/note-1.d: Don't run on h8300.
* binutils-all/objcopy.exp: Don't run strip-10 on msp or hpux.
(objcopy_test): Remove h8300-rtems from xfails.
Alan Modra [Thu, 23 Sep 2010 11:55:47 +0000 (11:55 +0000)]
* ld-d10v/reloc-007.d: Don't error.
* ld-d10v/reloc-008.d: Likewise.
* ld-d10v/reloc-015.d: Likewise.
* ld-d10v/reloc-016.d: Likewise.
* ld-d10v/reloc-012.ld: Use a sane offset.
Alan Modra [Thu, 23 Sep 2010 11:55:01 +0000 (11:55 +0000)]
* cpu-d10v.c: Make bits_per_address 18 for all arch_info entries.
Alan Modra [Thu, 23 Sep 2010 11:40:06 +0000 (11:40 +0000)]
ld/
* ldlang.c (lang_add_section): Don't copy SEC_RELOC from input
to output section on a final link.
bfd/
* elf.c (_bfd_elf_init_private_section_data): Allow for SEC_RELOC
difference between input and output section.
Maciej W. Rozycki [Thu, 23 Sep 2010 00:11:22 +0000 (00:11 +0000)]
* gas/mips/jal.d: Remove duplicate pattern.
gdbadmin [Thu, 23 Sep 2010 00:00:33 +0000 (00:00 +0000)]
*** empty log message ***
Alan Modra [Thu, 23 Sep 2010 00:00:04 +0000 (00:00 +0000)]
daily update
Joel Brobecker [Wed, 22 Sep 2010 22:50:54 +0000 (22:50 +0000)]
[Ada] Do not compute task ptid when debugging core file
After thread support over core files was added for GNU/Linux was added,
we started noticing the following type of crash when trying to perform
task switches (this is a bit accademic, since task switching is not
supported when debugging core files - this is what our testcase was
verifying).
(please check out the comment inside ada-tasks.c:task_command for
more details on this topic)
The reason for the crash comes from the fact that the GNU/Linux thread
layer now gets pushed on the target stack, causing the associated
to_get_ada_task_ptid target method to be activated. This routine
makes the assumption that, for all threads, the private area is not
NULL. This is incorrect in the case of core files, as the core layer
creates some threads with no private data.
But, taking a step back, we don't need to try to compute the task ptid,
as we'll never be using it anyways (we only use it for task switching).
So the fix is to avoid the ptid computation altogether when debugging
a core file.
gdb/ChangeLog:
* ada-tasks.c (read_atcb): Do not compute the task ptid when
debugging a core file.
Mike Frysinger [Wed, 22 Sep 2010 21:55:17 +0000 (21:55 +0000)]
opcodes: blackfin: fix decoding of 32bit addresses on 64bit systems
The Blackfin ISA is very exact with regards to address truncation when
under/over flowing its 32bit range. On a 32bit system, things work the
same and so addresses are decoded properly. On a 64bit system though,
the decoded addresses may include the bits that are supposed to have
been truncated. So force a 32bit truncation after the address has been
calculated.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:54:33 +0000 (21:54 +0000)]
opcodes: blackfin: fix decoding of all register move insns
Many register move insns were not being decoded properly, so rewrite
the whole function to be a bit more manageable in terms of valid
combinations.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:53:46 +0000 (21:53 +0000)]
opcodes: blackfin: fix decoding of many invalid insns
The Blackfin disassembler was originally based on the premise of parsing
valid opcodes all the time, so some of the opcode checking can be a bit
fuzzy. This is exemplified in decoding of parallel insns where many
times things are decoded as invalid when in reality, they may not be
used in parallel combinations. So add parallel checking to most insn
decoding routines so we see ILLEGAL and not just whatever insn happens
to be close to a valid mnemonic, as well as some additional sub-opcode
checks.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:53:14 +0000 (21:53 +0000)]
opcodes: blackfin: mark push/pop insns with a P6/P7 range as illegal
The push/pop multiple insn has a 3 bit field for the P register range,
but only values of 0...5 are valid (P0 - P5). There is no such P6 or
P7 register, so mark these insns as illegal.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:41:39 +0000 (21:41 +0000)]
opcodes: blackfin: fix decoding of vector shift insn w/saturation
The saturation bit was missed when decoding a vector shift insn
leading to the output looking the same as the non-saturating insn.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:39:08 +0000 (21:39 +0000)]
opcodes: blackfin: decode all ASTAT bits
All ASTAT bits work in the hardware even though they aren't part of the
official Blackfin ISA. So decode every ASTAT field to make the output
a bit nicer when working with hand generated opcodes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:38:20 +0000 (21:38 +0000)]
opcodes: blackfin: decode insns with invalid register as illegal
Sometimes the encoding in the opcode is a 4 bit field which defines a
register number. However, register numbers are only 0-7, so make sure
we call illegal for when the opcode register number is greater than 8.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:36:09 +0000 (21:36 +0000)]
MAINTAINERS: add myself for Blackfin parts
I know a thing or two about Blackfin parts, and if I can't find the
answer, I can usually locate someone who does. Especially since Jie
and Bernd no longer work for ADI :(.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:34:10 +0000 (21:34 +0000)]
gas: blackfin: fix typo in BYTEOP16P comment
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:31:18 +0000 (21:31 +0000)]
gas: blackfin: reject multiple store insns in parallel insns
Check for & reject attempts to use multiple store insns in a single
parallel insn combination. These are illegal per the Blackfin ISA.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:30:35 +0000 (21:30 +0000)]
gas: blackfin: add missing register move insns
The Blackfin ISA supports moving just about anything to/from EMUDAT, so
make sure the assembler accepts these insns too.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:29:41 +0000 (21:29 +0000)]
gas: blackfin: clarify some errors with register usage in insns
Using "Register mismatch" everywhere can be a bit vague, so clarify
why exactly we're barfing on these unsupported insns.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:26:13 +0000 (21:26 +0000)]
gas: blackfin: fix DBG/DBGCMPLX insn encoding
Some extended registers when given to the DBG/DBGCMPLX pseudo insns are
not encoded properly. So fix them, fix the display of them when being
disassembled, and add testcases.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:08:31 +0000 (21:08 +0000)]
gas: blackfin: handle multibyte symbols
Accept any 8bit char with the high bit set so as to support multibyte
characters. Also use the locale safe regular expressions to match
chars/digits. This brings the Blackfin assembler inline with the
behavior of other assemblers.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:05:03 +0000 (21:05 +0000)]
opcodes/gas: blackfin: handle more ASTAT flags
Support a few more ASTAT bits with the standard insns that operate on
ASTAT bits directly.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 20:59:00 +0000 (20:59 +0000)]
opcodes/gas: blackfin: support OUTC debug insn
The disassembler has partial (but incomplete/broken) support already for
the pseudo debug insn OUTC, so let's fix it up and finish it. And now
that the disassembler can handle it, make sure our assembler can output
it too.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 20:37:25 +0000 (20:37 +0000)]
opcodes: blackfin: fix decoding of LSHIFT insns
The Blackfin ISA does not have a "SHIFT" insn, it has either LSHIFT,
ASHIFT, or BXORSHIFT. So be specific when disassembling.
As fall out of this change, we need to update some assembler tests.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 20:32:40 +0000 (20:32 +0000)]
opcodes: blackfin: constify formatting related structures
No need for these local structures related to formatting of output to
be writable, so constify the whole shebang.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 20:21:32 +0000 (20:21 +0000)]
gas: blackfin: support ABORT debug insn
There is a pseudo debug insn named ABORT that is commonly used in
simulation, so support it in the assembler too. The disassembler
already supports it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 20:19:53 +0000 (20:19 +0000)]
gas: blackfin: add support for BF51x-0.2 processors
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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