Mingkai Hu [Fri, 2 Aug 2013 06:39:09 +0000 (14:39 +0800)]
powerpc/85xx: Add SEC6.0 device tree
Add device tree for SEC 6.0 used on C29x silicon.
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Wang Dongsheng [Thu, 8 Aug 2013 02:06:45 +0000 (10:06 +0800)]
powerpc: add Book E support to 64-bit hibernation
Update the 64-bit hibernation code to support Book E CPUs.
Some registers and instructions are not defined for Book3e
(SDR reg, tlbia instruction).
SDR: Storage Description Register. Book3S and Book3E have different
address translation mode, we do not need HTABORG & HTABSIZE to
translate virtual address to real address.
More registers are saved in BookE-64bit.(TCR, SPRG1)
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Chunhe Lan [Tue, 30 Jul 2013 21:39:26 +0000 (05:39 +0800)]
powerpc/85xx: Add P1023RDB board support
P1023RDB Specification:
-----------------------
Memory subsystem:
512MB DDR3 (Fixed DDR on board)
64MB NOR flash
128MB NAND flash
Ethernet:
eTSEC1: Connected to Atheros AR8035 GETH PHY
eTSEC2: Connected to Atheros AR8035 GETH PHY
PCIe:
Three mini-PCIe slots
USB:
Two USB2.0 Type A ports
I2C:
AT24C08 8K Board EEPROM (8 bit address)
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Haijun.Zhang [Wed, 17 Jul 2013 05:12:27 +0000 (13:12 +0800)]
powerpc/85xx: Add support for 85xx cpu type detection
Add this file to help detect cpu type in runtime.
These macros will be more favorable for driver
to apply errata and workaround to specified cpu type.
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Fri, 16 Aug 2013 00:19:10 +0000 (19:19 -0500)]
powerpc/e500: Set -mcpu flag for 32-bit e500
Unlike 64-bit, we don't currently support multiplatform between e500
and non-e500, so the -mcpu is not configurable at this time.
-msoft-float is specified when testing for -mcpu=8540 because otherwise
some older toolchains will fail with "error: E500 and FPRs not
supported".
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 21 Aug 2013 00:55:36 +0000 (19:55 -0500)]
powerpc/booke64: Use appropriate -mcpu
By default use -mcpu=powerpc64 rather than -mtune=power7
Add options for e5500/e6500, with fallbacks for older compilers.
Hide the POWER cpu options in booke configs.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 21 Aug 2013 00:53:10 +0000 (19:53 -0500)]
powerpc/85xx: Remove -Wa,-me500
This caused lwsync to be converted to sync on 64-bit (on 32-bit lwsync
is generated at runtime, and so wasn't affected). Not using lwsync
caused a significant slowdown on certain workloads.
Setting this flag for any e500-enabled build is also not friendly to
multiplatform kernels.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 21 Aug 2013 00:33:12 +0000 (19:33 -0500)]
powerpc: Convert some mftb/mftbu into mfspr
Some CPUs (such as e500v1/v2) don't implement mftb and will take a
trap. mfspr should work on everything that has a timebase, and is the
preferred instruction according to ISA v2.06.
Currently we get away with mftb on 85xx because the assembler converts
it to mfspr due to -Wa,-me500. However, that flag has other effects
that are undesireable for certain targets (e.g. lwsync is converted to
sync), and is hostile to multiplatform kernels. Thus we would like to
stop setting it for all e500-family builds.
mftb/mftbu instances which are in 85xx code or common code are
converted. Instances which will never run on 85xx are left alone.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Wed, 24 Jul 2013 01:21:11 +0000 (20:21 -0500)]
powerpc/fsl-booke: Work around erratum A-006958
Erratum A-006598 says that 64-bit mftb is not atomic -- it's subject
to a similar race condition as doing mftbu/mftbl on 32-bit. The lower
half of timebase is updated before the upper half; thus, we can share
the workaround for a similar bug on Cell. This workaround involves
looping if the lower half of timebase is zero, thus avoiding the need
for a scratch register (other than CR0). This workaround must be
avoided when the timebase is frozen, such as during the timebase sync
code.
This deals with kernel and vdso accesses, but other userspace accesses
will of course need to be fixed elsewhere.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Benjamin Herrenschmidt [Fri, 16 Aug 2013 00:13:06 +0000 (10:13 +1000)]
powerpc/wsp: Fix early debug build
When reworking udbg_16550.c I forgot to remove the old and now useless
code for the CONFIG_PPC_EARLY_DEBUG_WSP case, which doesn't build as
a result. I also missed a cast.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:51 +0000 (02:01 +1000)]
powerpc: Make rwlocks endian safe
Our ppc64 spinlocks and rwlocks use a trick where a lock token and
the paca index are placed in the lock with a single store. Since we
are using two u16s they need adjusting for little endian.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:50 +0000 (02:01 +1000)]
powerpc: Fix little endian coredumps
We need to set ELF_DATA correctly on LE coredumps.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:49 +0000 (02:01 +1000)]
powerpc/pseries: Fix endian issues in H_GET_TERM_CHAR/H_PUT_TERM_CHAR
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:48 +0000 (02:01 +1000)]
powerpc: Little endian SMP IPI demux
Add little endian support for demuxing SMP IPIs
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:47 +0000 (02:01 +1000)]
powerpc: Emulate instructions in little endian mode
Alistair noticed we got a SIGILL on userspace mfpvr instructions.
Remove the little endian check in the emulation code, it is
probably there to protect against the old pseudo little endian
implementations but doesn't make sense for real little endian.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:46 +0000 (02:01 +1000)]
powerpc: Fix little endian lppaca, slb_shadow and dtl_entry
The lppaca, slb_shadow and dtl_entry hypervisor structures are
big endian, so we have to byte swap them in little endian builds.
LE KVM hosts will also need to be fixed but for now add an #error
to remind us.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:45 +0000 (02:01 +1000)]
powerpc: Add endian annotations to lppaca, slb_shadow and dtl_entry
Add endian annotation to various hypervisor structures which
are defined as big endian.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Alistair Popple [Tue, 6 Aug 2013 16:01:44 +0000 (02:01 +1000)]
powerpc: Make NUMA device node code endian safe
The device tree is big endian so make sure we byteswap on little
endian. We assume any pHyp calls also return big endian results in
memory.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Alistair Popple [Tue, 6 Aug 2013 16:01:43 +0000 (02:01 +1000)]
powerpc: Little endian fixes for legacy_serial.c
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:42 +0000 (02:01 +1000)]
powerpc: Make PCI device node device tree accesses endian safe
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:41 +0000 (02:01 +1000)]
powerpc: Make OF PCI device tree accesses endian safe
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:40 +0000 (02:01 +1000)]
powerpc: Make device tree accesses in VIO subsystem endian safe
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:39 +0000 (02:01 +1000)]
powerpc: Make device tree accesses in HVC VIO console endian safe
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Tue, 6 Aug 2013 16:01:38 +0000 (02:01 +1000)]
powerpc: Make prom_init.c endian safe
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:37 +0000 (02:01 +1000)]
powerpc: Make device tree accesses in cache info code endian safe
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:36 +0000 (02:01 +1000)]
powerpc: of_parse_dma_window should take a __be32 *dma_window
We pass dma_window to of_parse_dma_window as a void * and then
run through hoops to cast it back to a u32 array. In the process
we lose endian annotation.
Simplify it by just passing a __be32 * down.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:35 +0000 (02:01 +1000)]
powerpc: Fix some endian issues in xics code
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:34 +0000 (02:01 +1000)]
powerpc: Add some endian annotations to time and xics code
Fix a couple of sparse warnings.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Alistair Popple [Tue, 6 Aug 2013 16:01:33 +0000 (02:01 +1000)]
powerpc: More little endian fixes for setup-common.c
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:32 +0000 (02:01 +1000)]
powerpc: Make logical to real cpu mapping code endian safe
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:31 +0000 (02:01 +1000)]
powerpc: Make RTAS calls endian safe
RTAS expects arguments in the call buffer to be big endian so we
need to byteswap on little endian builds
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:30 +0000 (02:01 +1000)]
powerpc: Make cache info device tree accesses endian safe
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:29 +0000 (02:01 +1000)]
powerpc: Make RTAS device tree accesses endian safe
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Alistair Popple [Tue, 6 Aug 2013 16:01:28 +0000 (02:01 +1000)]
powerpc: More little endian fixes for prom.c
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Ian Munsie [Tue, 6 Aug 2013 16:01:27 +0000 (02:01 +1000)]
powerpc: Make prom.c device tree accesses endian safe
On PowerPC the device tree is always big endian, but the CPU could be
either, so add be32_to_cpu where appropriate and change the types of
device tree data to __be32 etc to allow sparse to locate endian issues.
Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Michael Neuling [Tue, 13 Aug 2013 05:54:52 +0000 (15:54 +1000)]
powerpc: Avoid link stack corruption for MMU on exceptions
When we have MMU on exceptions (POWER8) and a relocatable kernel, we
need to branch from the initial exception vectors at 0x0 to up high
where the kernel might be located. Currently we do this using the link
register.
Unfortunately this corrupts the link stack and instead we should use the
count register. We did this for the syscall entry path in:
6a40480 powerpc: Avoid link stack corruption in MMU on syscall entry path
but I stupidly forgot to do the same for other exceptions.
This patch changes the initial exception vectors to use the count
register instead of the link register when we need to branch up to the
relocated kernel.
I have a dodgy userspace test which loops calling a function that reads
the PVR (mfpvr in userspace will be emulated by the kernel via the
program check exception). On POWER8 and with CONFIG_RELOCATABLE=y, I
get a ~10% performance improvement with my userspace test with this
patch.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Vasant Hegde [Mon, 12 Aug 2013 12:05:57 +0000 (17:35 +0530)]
powerpc: Make chip-id information available to userspace
So far "/sys/devices/system/cpu/cpuX/topology/physical_package_id"
was always default (-1) on ppc64 architecture.
Now, some systems have an ibm,chip-id property in the cpu nodes in
the device tree. On these systems, we now use this information to
display physical_package_id.
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Mike Qiu [Mon, 12 Aug 2013 06:15:36 +0000 (02:15 -0400)]
powerpc/eeh: powerpc/eeh: Fix undefined variable
changes for V4:
- changes the type of frozen_pe_no from %d to %llu
in pr_devel()
'pe_no' hasn't been defined, it should be an typo error,
it should be 'frozen_pe_no'.
Also '__func__' has missed in IODA_EEH_DBG(),
For safety reasons, use pr_devel() directly, instead
of use IODA_EEH_DBG()
Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Wed, 14 Aug 2013 04:17:24 +0000 (14:17 +1000)]
Revert "powerpc/e500: Update compilation flags with core specific options"
This reverts commit
c8db32c8669f7de05b820ee4934926405af52188.
The commit breaks the build of all my 64-bit embedded configs. It
looks like gcc-4.7.3 doesn't know about e5500. Additionally it
incorrectly does -mcpu=e5500 on a config that has both e5500 and A2
support enabled.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Paul Mackerras [Mon, 12 Aug 2013 06:29:33 +0000 (16:29 +1000)]
powerpc: Use ibm, chip-id property to compute cpu_core_mask if available
Some systems have an ibm,chip-id property in the cpu nodes in the
device tree. On these systems, we now use that to compute the
cpu_core_mask (i.e. the set of core siblings) rather than looking
at cache properties.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Tested-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Paul Mackerras [Mon, 12 Aug 2013 06:28:47 +0000 (16:28 +1000)]
powerpc: Pull out cpu_core_mask updates into a separate function
This factors out the details of updating cpu_core_mask into a separate
function, to make it easier to change how the mask is calculated later.
This makes no functional change.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Paul Mackerras [Mon, 12 Aug 2013 06:12:06 +0000 (16:12 +1000)]
powerpc: Fix denormalized exception handler
The denormalized exception handler (denorm_exception_hv) has a couple
of bugs. If the CONFIG_PPC_DENORMALISATION option is not selected,
or the HSRR1_DENORM bit is not set in HSRR1, we don't test whether the
interrupt occurred within a KVM guest. On the other hand, if the
HSRR1_DENORM bit is set and CONFIG_PPC_DENORMALISATION is enabled,
we corrupt the CFAR and PPR.
To correct these problems, this replaces the open-coded version of
EXCEPTION_PROLOG_1 that is there currently, and that is missing the
saving of PPR and CFAR values to the PACA, with an instance of
EXCEPTION_PROLOG_1. This adds an explicit KVMTEST after testing
whether the exception is one we can handle, and adds code to restore
the CFAR on exit.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Mark Brown [Tue, 6 Aug 2013 17:41:52 +0000 (18:41 +0100)]
powerpc: Ignore zImage.epapr
This is another file we can generate so add it to the list.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
James Yang [Thu, 4 Jul 2013 21:18:44 +0000 (16:18 -0500)]
powerpc/math-emu: Fix load/store indexed emulation
Load/store indexed instructions where the index register RA=R0, such
as "lfdx f1,0,r3", are not illegal.
Load/store indexed with update instructions where the index register
RA=R0, such as "lfdux f1,0,r3", are invalid, and, to be consistent
with existing math-emu behavior for other invalid instruction forms,
will signal as illegal.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Sun, 14 Jul 2013 09:02:06 +0000 (17:02 +0800)]
powerpc: Remove the empty giveup_fpu() function on 32bit kernel
Instead of implementing an empty giveup_fpu() function for each
32bit processor type, replace them with an unique empty inline
function.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Sun, 14 Jul 2013 09:02:05 +0000 (17:02 +0800)]
powerpc: Make flush_fp_to_thread() nop when CONFIG_PPC_FPU is disabled
In the current kernel, the function flush_fp_to_thread() is not
dependent on CONFIG_PPC_FPU. So most invocations of this function
is not wrapped by CONFIG_PPC_FPU. Even through we don't really
save the FPRs to the thread struct if CONFIG_PPC_FPU is not enabled,
but there does have some runtime overhead such as the check for
tsk->thread.regs and preempt disable and enable. It really make
no sense to do that. So make it a nop when CONFIG_PPC_FPU is
disabled. Also remove the wrapped #ifdef CONFIG_PPC_FPU
when invoking this function.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Sun, 14 Jul 2013 09:02:04 +0000 (17:02 +0800)]
powerpc: Remove the redundant flush_fp_to_thread() in setup_sigcontext()
In commit
c6e6771b(powerpc: Introduce VSX thread_struct and CONFIG_VSX)
we add a invocation of flush_fp_to_thread() before copying the FPR or
VSR to users. But we already invoke the flush_fp_to_thread() in this
function. So remove one of them.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Tue, 16 Jul 2013 11:57:16 +0000 (19:57 +0800)]
powerpc/mpc85xx: Only emulate the unimplemented FP instructions on corenet64
We have split the math emulation into two parts. This makes it
possible to just emulate the unimplemented floating point instructions
on these boards.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Sun, 14 Jul 2013 09:02:03 +0000 (17:02 +0800)]
powerpc: remove the unused function disable_kernel_fp()
The only using of function disable_kernel_fp() was already dropped
in the commit
5daf9071 (powerpc: merge align.c).
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Tue, 16 Jul 2013 11:57:15 +0000 (19:57 +0800)]
powerpc: split She math emulation into two parts
For some SoC (such as the FSL BookE) even though there does have
a hardware FPU, but not all floating point instructions are
implemented. Unfortunately some versions of gcc do use these
unimplemented instructions. Then we have to enable the math emulation
to workaround this issue. It seems a little redundant to have the
support to emulate all the floating point instructions in this case.
So split the math emulation into two parts. One is for the SoC which
doesn't have FPU at all and the other for the SoC which does have the
hardware FPU and only need some special floating point instructions to
be emulated.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Sun, 14 Jul 2013 08:40:07 +0000 (16:40 +0800)]
powerpc: Introduce function emulate_math()
There are two invocations of do_mathemu() in traps.c. And the codes
in these two places are almost the same. Introduce a locale function
to eliminate the duplication. With this change we can also make sure
that in program_check_exception() the PPC_WARN_EMULATED is invoked for
the correctly emulated math instructions.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Sun, 14 Jul 2013 08:40:06 +0000 (16:40 +0800)]
powerpc/math-emu: Move the flush FPU state function into do_mathemu
By doing this we can make sure that the FPU state is only flushed to
the thread struct when it is really needed.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Wed, 10 Jul 2013 01:49:52 +0000 (09:49 +0800)]
powerpc/85xx: Enable the math emulation for the corenet64_smp_defconfig
I got the following error on my t4240qds board.
ntpd[2713]: unhandled signal 4 at
0fd5b448 nip
0fd5b448 lr
0fd5b424 code 30001
The root cause is that the float point instruction 'fsqrt' is used.
But this instruction is not implemented on e6500 core. Even this
does seem a gcc bug, I would like to enable the math emulation
in the kernel to workaround this kind of issue.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Paul Bolle [Tue, 16 Jul 2013 08:56:38 +0000 (10:56 +0200)]
powerpc/8xx: Remove last traces of 8XX_MINIMAL_FPEMU
The Kconfig symbol 8XX_MINIMAL_FPEMU was removed in commit
968219fa33
("powerpc/8xx: Remove 8xx specific "minimal FPU emulation""). But that
commit didn't remove all code depending on that symbol. Do so now.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Wed, 10 Jul 2013 01:43:43 +0000 (09:43 +0800)]
powerpc/math-emu: Remove the unneeded check for CONFIG_MATH_EMULATION in math.c
The math.c is only built when CONFIG_MATH_EMULATION is enabled.
So the #ifdef check for CONFIG_MATH_EMULATION in it seems redundant.
Drop all of them.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Wed, 10 Jul 2013 01:43:42 +0000 (09:43 +0800)]
powerpc/math-emu: Remove the dead code in math.c
The math.c is only built when CONFIG_MATH_EMULATION is enabled.
So we would never get into the case that CONFIG_MATH_EMULATION
is not defined in this file.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Mon, 15 Jul 2013 03:03:15 +0000 (13:03 +1000)]
powerpc/powernv: Enable detection of legacy UARTs
Legacy UARTs can exist on PowerNV, memory-mapped ones on PCI
or IO based ones on the LPC bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Mon, 15 Jul 2013 03:03:14 +0000 (13:03 +1000)]
powerpc/powernv: Don't crash if there are no OPAL consoles
Some machines might provide the console via a different mechanism
such as direct access to a UART from Linux, in which case OPAL
might not expose any console. In that case, the code would cause
a NULL dereference.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Mon, 15 Jul 2013 03:03:13 +0000 (13:03 +1000)]
powerpc: Check "status" property before adding legacy ISA serial ports
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Mon, 15 Jul 2013 03:03:12 +0000 (13:03 +1000)]
powerpc: Cleanup udbg_16550 and add support for LPC PIO-only UARTs
The udbg_16550 code, which we use for our early consoles and debug
backends was fairly messy. Especially for the debug consoles, it
would re-implement the "high level" getc/putc/poll functions for
each access method. It also had code to configure the UART but only
for the straight MMIO method.
This changes it to instead abstract at the register accessor level,
and have the various functions and configuration routines use these.
The result is simpler and slightly smaller code, and free support
for non-MMIO mapped PIO UARTs, which such as the ones that can be
present on a POWER 8 LPC bus.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Mon, 15 Jul 2013 03:03:11 +0000 (13:03 +1000)]
powerpc/powernv: Add PIO accessors for Power8 LPC bus
This uses the hooks provided by CONFIG_PPC_INDIRECT_PIO to
implement a set of hooks for IO port access to use the LPC
bus via OPAL calls for the first 64K of IO space
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Mon, 15 Jul 2013 03:03:10 +0000 (13:03 +1000)]
powerpc/powernv: Add helper to get ibm,chip-id of a node
This includes walking the parent nodes if necessary.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Mon, 15 Jul 2013 03:03:09 +0000 (13:03 +1000)]
powerpc/powernv: Update opal.h to add new LPC and XSCOM functions
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Mon, 15 Jul 2013 03:03:08 +0000 (13:03 +1000)]
powerpc: Better split CONFIG_PPC_INDIRECT_PIO and CONFIG_PPC_INDIRECT_MMIO
Remove the generic PPC_INDIRECT_IO and ensure we only add overhead
to the right accessors. IE. If only CONFIG_PPC_INDIRECT_PIO is set,
we don't add overhead to all MMIO accessors.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tiejun Chen [Tue, 16 Jul 2013 03:09:30 +0000 (11:09 +0800)]
powerpc/ppc64: Rename SOFT_DISABLE_INTS with RECONCILE_IRQ_STATE
The SOFT_DISABLE_INTS seems an odd name for something that updates the
software state to be consistent with interrupts being hard disabled, so
rename SOFT_DISABLE_INTS with RECONCILE_IRQ_STATE to avoid this confusion.
Signed-off-by: Tiejun Chen <tiejun.chen@windriver.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Jingoo Han [Fri, 19 Jul 2013 07:16:56 +0000 (16:16 +0900)]
macintosh/ams: Replace strict_strtoul() with kstrtoul()
The usage of strict_strtoul() is not preferred, because
strict_strtoul() is obsolete. Thus, kstrtoul() should be
used.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Thu, 25 Jul 2013 02:12:32 +0000 (12:12 +1000)]
powerpc/pmac: Early debug output on screen on 64-bit macs
We have a bunch of CONFIG_PPC_EARLY_DEBUG_* options that are intended
for bringup/debug only. They hard wire a machine specific udbg backend
very early on (before we even probe the platform), and use whatever
tricks are available on each machine/cpu to be able to get some kind
of output out there early on.
So far, on powermac with no serial ports, we have CONFIG_PPC_EARLY_DEBUG_BOOTX
to use the low-level btext engine on the screen, but it doesn't do much, at
least on 64-bit. It only really gets enabled after the platform has been
probed and the MMU enabled.
This adds a way to enable it much earlier. From prom_init.c (while still
running with Open Firmware), we grab the screen details and set things up
using the physical address of the frame buffer.
Then btext itself uses the "rm_ci" feature of the 970 processor (Real
Mode Cache Inhibited) to access it while in real mode.
We need to do a little bit of reorg of the btext code to inline things
better, in order to limit how much we touch memory while in this mode as
the consequences might be ... interesting.
This successfully allowed me to debug problems early on with the G5
(related to gold being broken vs. ppc64 kernels).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Gavin Shan [Wed, 31 Jul 2013 08:43:56 +0000 (16:43 +0800)]
powerpc/pci: Remove duplicate check in pcibios_fixup_bus()
pci_read_bridge_bases() already checks if the PCI bus is root
bus or not, so we needn't do same check in pcibios_fixup_bus()
and just remove it.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Gavin Shan [Wed, 31 Jul 2013 08:47:04 +0000 (16:47 +0800)]
powerpc/powernv: Needn't IO segment map for PHB3
PHB3 doesn't support IO ports and we needn't IO segment map for that.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Gavin Shan [Wed, 31 Jul 2013 08:47:02 +0000 (16:47 +0800)]
powerpc/powernv: Check primary PHB through ID
The index of one specific PCI controller (struct pci_controller::
global_number) can tell that it's primary one or not. So we needn't
additional variable for that and just remove it.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Gavin Shan [Wed, 31 Jul 2013 08:47:01 +0000 (16:47 +0800)]
powerpc/powernv: Fetch PHB bus range from dev-tree
The patch enables fetching bus range from device-tree for the
specific PHB. If we can't get that from device-tree, the default
range [0 255] will be used.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Gavin Shan [Wed, 31 Jul 2013 08:47:00 +0000 (16:47 +0800)]
powerpc/powernv: Free PHB instance upon error
We don't free PHB instance (struct pnv_phb) on error to creating
the associated PCI controler (struct pci_controller). The patch
fixes that. Also, the output messages have been cleaned for a bit
so that they looks unified for IODA_1/2 cases.
Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Paul Mackerras [Mon, 5 Aug 2013 04:13:16 +0000 (14:13 +1000)]
powerpc: Fix VRSAVE handling
Since 2002, the kernel has not saved VRSAVE on exception entry and
restored it on exit; rather, VRSAVE gets context-switched in _switch.
This means that when executing in process context in the kernel, the
userspace VRSAVE value is live in the VRSAVE register.
However, the signal code assumes that current->thread.vrsave holds
the current VRSAVE value, which is incorrect. Therefore, this
commit changes it to use the actual VRSAVE register instead. (It
still uses current->thread.vrsave as a temporary location to store
it in, as __get_user and __put_user can only transfer to/from a
variable, not an SPR.)
This also modifies the transactional memory code to save and restore
VRSAVE regardless of whether VMX is enabled in the MSR. This is
because accesses to VRSAVE are not controlled by the MSR.VEC bit,
but can happen at any time.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Paul Mackerras [Mon, 5 Aug 2013 04:11:23 +0000 (14:11 +1000)]
powerpc: Implement __get_user_pages_fast()
Other architectures have a __get_user_pages_fast(), in addition to the
regular get_user_pages_fast(), which doesn't call get_user_pages() on
failure, and thus doesn't attempt to fault pages in or COW them. The
generic KVM code uses __get_user_pages_fast() to detect whether a page
for which we have only requested read access is actually writable.
This provides an implementation of __get_user_pages_fast() by
splitting the existing get_user_pages_fast() in two. With this, the
generic KVM code will get the right answer instead of always
considering such pages non-writable.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Michael Ellerman [Tue, 6 Aug 2013 07:42:37 +0000 (17:42 +1000)]
selftests: Add test of PMU instruction counting on powerpc
This commit adds a test of instruction counting using the PMU on powerpc.
Although the bulk of the code is architecture agnostic, the code needs to
run a precisely sized loop which is implemented in assembler.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Michael Ellerman [Tue, 6 Aug 2013 07:42:36 +0000 (17:42 +1000)]
selftests: Add support files for powerpc tests
This commit adds support code used by upcoming powerpc tests.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Michael Ellerman [Tue, 6 Aug 2013 07:42:35 +0000 (17:42 +1000)]
selftests: Add infrastructure for powerpc selftests
This commit adds a powerpc subdirectory to tools/testing/selftests,
for tests that are powerpc specific.
On other architectures nothing is built. The makefile supports cross
compilation if the user sets ARCH and CROSS_COMPILE.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Andy Fleming [Mon, 5 Aug 2013 19:58:35 +0000 (14:58 -0500)]
powerpc: Convert platforms to smp_generic_cpu_bootable
T4, Cell, powernv, and pseries had the same implementation, so switch
them to use a generic version. A2 apparently had a version, but
removed it at some point, so we remove the declaration, too.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Andy Fleming [Mon, 5 Aug 2013 19:58:34 +0000 (14:58 -0500)]
powerpc: Add smp_generic_cpu_bootable
Cell and PSeries both implemented their own versions of a
cpu_bootable smp_op which do the same thing (well, the PSeries
one has support for more than 2 threads). Copy the PSeries one
to generic code, and rename it smp_generic_cpu_bootable.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Tue, 6 Aug 2013 10:23:31 +0000 (18:23 +0800)]
powerpc: Remove the symbol __flush_icache_range
And now the function flush_icache_range() is just a wrapper which
only invoke the function __flush_icache_range() directly. So we
don't have reason to keep it anymore.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Kevin Hao [Tue, 6 Aug 2013 10:23:30 +0000 (18:23 +0800)]
powerpc: Move the testing of CPU_FTR_COHERENT_ICACHE into __flush_icache_range
In function flush_icache_range(), we use cpu_has_feature() to test
the feature bit of CPU_FTR_COHERENT_ICACHE. But this seems not optimal
for two reasons:
a) For ppc32, the function __flush_icache_range() already do this
check with the macro END_FTR_SECTION_IFSET.
b) Compare with the cpu_has_feature(), the method of using macro
END_FTR_SECTION_IFSET will not introduce any runtime overhead.
[And while at it, add the missing required isync] -- BenH
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:26 +0000 (02:01 +1000)]
powerpc: Stop using non-architected shared_proc field in lppaca
Although the shared_proc field in the lppaca works today, it is
not architected. A shared processor partition will always have a non
zero yield_count so use that instead. Create a wrapper so users
don't have to know about the details.
In order for older kernels to continue to work on KVM we need
to set the shared_proc bit. While here, remove the ugly bitfield.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:25 +0000 (02:01 +1000)]
powerpc/pci: Don't use bitfield for force_32bit_msi
Fix a sparse warning about force_32bit_msi being a one bit bitfield.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:24 +0000 (02:01 +1000)]
powerpc: Fix a number of sparse warnings
Address some of the trivial sparse warnings in arch/powerpc.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:23 +0000 (02:01 +1000)]
powerpc/pseries: Simplify H_GET_TERM_CHAR
plpar_get_term_char is only used once and just adds a layer
of complexity to H_GET_TERM_CHAR. plpar_put_term_char isn't
used at all so we can remove it.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:22 +0000 (02:01 +1000)]
powerpc: Simplify logic in include/uapi/asm/elf.h
Simplify things by putting all the 32bit and 64bit defines
together instead of in two spots.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:21 +0000 (02:01 +1000)]
powerpc: Remove SAVE_VSRU and REST_VSRU macros
We always use VMX loads and stores to manage the high 32
VSRs. Remove these unused macros.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:20 +0000 (02:01 +1000)]
powerpc: Wrap MSR macros with parentheses
Not having parentheses around a macro is asking for trouble.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:19 +0000 (02:01 +1000)]
powerpc: Handle unaligned ldbrx/stdbrx
Normally when we haven't implemented an alignment handler for
a load or store instruction the process will be terminated.
The alignment handler uses the DSISR (or a pseudo one) to locate
the right handler. Unfortunately ldbrx and stdbrx overlap lfs and
stfs so we incorrectly think ldbrx is an lfs and stdbrx is an
stfs.
This bug is particularly nasty - instead of terminating the
process we apply an incorrect fixup and continue on.
With more and more overlapping instructions we should stop
creating a pseudo DSISR and index using the instruction directly,
but for now add a special case to catch ldbrx/stdbrx.
Signed-off-by: Anton Blanchard <anton@samba.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Anton Blanchard [Tue, 6 Aug 2013 16:01:18 +0000 (02:01 +1000)]
powerpc: Align p_toc
p_toc is an 8 byte relative offset to the TOC that we place in the
text section. This means it is only 4 byte aligned where it should
be 8 byte aligned. Add an explicit alignment.
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Fri, 9 Aug 2013 06:01:40 +0000 (16:01 +1000)]
Merge remote-tracking branch 'scott/next' into next
Merge some Freescale updates from Scott Wood
Catalin Udma [Tue, 30 Jul 2013 11:39:24 +0000 (14:39 +0300)]
powerpc/e500: Update compilation flags with core specific options
If CONFIG_E500 is enabled, the compilation flags are updated
specifying the target core -mcpu=e5500/e500mc/8540
Also remove -Wa,-me500, being incompatible with -mcpu=e5500/e6500
The assembler option is redundant if the -mcpu= flag is set.
The patch fixes the kernel compilation problem for e5500/e6500
when using gcc option -mcpu=e5500/e6500.
Signed-off-by: Catalin Udma <catalin.udma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Zhenhua Luo [Thu, 11 Apr 2013 13:56:30 +0000 (21:56 +0800)]
powerpc/fsl: Enable CONFIG_DEVTMPFS_MOUNT so /dev can be mounted correctly
When using recent udev, the /dev node mount requires CONFIG_DEVTMPFS_MOUNT
is enabled in Kernel. The patch enables the option in defconfig of Freescale
QorIQ targets.
Changed defconfig list:
arch/powerpc/configs/85xx/p1023rds_defconfig
arch/powerpc/configs/corenet32_smp_defconfig
arch/powerpc/configs/corenet64_smp_defconfig
arch/powerpc/configs/mpc85xx_smp_defconfig
arch/powerpc/configs/mpc85xx_defconfig
arch/powerpc/configs/mpc83xx_defconfig
Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com>
[scottwood@freescale.com: added mpc83xx and non-smp mpc85xx]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Yuanquan Chen [Fri, 17 May 2013 07:35:29 +0000 (15:35 +0800)]
powerpc/pci: fix PCI-e check link issue
For Freescale powerpc platform, the PCI-e bus number uses the reassign mode
by default. It means the second PCI-e controller's hose->first_busno is the
first controller's last bus number adding 1. For some hotpluged device(or
controlled by FPGA), the device is linked to PCI-e slot at linux runtime.
It needs rescan for the system to add it and driver it to work. It successes
to rescan the device linked to the first PCI-e controller's slot, but fails to
rescan the device linked to the second PCI-e controller's slot. The cause is
that the bus->number is reset to 0, which isn't equal to the hose->first_busno
for the second controller checking PCI-e link. So it doesn't really check the
PCI-e link status, the link status is always no_link. The device won't be
really rescaned. Reset the bus->number to hose->first_busno in the function
fsl_pcie_check_link(), it will do the real checking PCI-e link status for the
second controller, the device will be rescaned.
Signed-off-by: Yuanquan Chen <Yuanquan.Chen@freescale.com>
Tested-by: Rojhalat Ibrahim <imr@rtschenk.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Kevin Hao [Tue, 21 May 2013 12:05:00 +0000 (20:05 +0800)]
powerpc/fsl-pci: enable SWIOTLB in function setup_pci_atmu
This function contains all the stuff we need to check if SWIOTLB
should be enabled or not. So it is more convenient to enable
the SWIOTLB here than later.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Kevin Hao [Tue, 21 May 2013 12:04:59 +0000 (20:04 +0800)]
powerpc/fsl-pci: fix the unreachable warning message
The (1ull << mem_log) is never greater than mem unless mem_log++;
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Kevin Hao [Tue, 21 May 2013 12:04:58 +0000 (20:04 +0800)]
powerpc/mpc85xx: remove the unneeded pci init functions for corenet ds board
The function pci_devs_phb_init is invoked more earlier than we really
probe the pci controller, so it does nothing at all. And we also don't
need the pci_dn stuff for the fsl powerpc64 boards, just remove it.
It also seems that we don't support ISA on all the current corenet ds
boards. So picking a primary bus seems useless, remove that function
too.
Signed-off-by: Kevin Hao <haokexin@gmail.com>
Haijun.Zhang [Mon, 15 Jul 2013 08:22:33 +0000 (16:22 +0800)]
powerpc/85xx: add the P1020RDB-PD DTS support
Overview of P1020RDB-PD device:
- DDR3 2GB
- NOR flash 64MB
- NAND flash 128MB
- SPI flash 16MB
- I2C EEPROM 256Kb
- eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
- eTSEC2 (SGMII PHY)
- eTSEC3 (RGMII PHY)
- SDHC
- 1 USB ports
- TDM ports
- PCIe
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Xie Xiaobo-R63061 <X.Xie@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Haijun.Zhang [Mon, 1 Jul 2013 04:12:22 +0000 (12:12 +0800)]
powerpc/85xx: add P1020RDB-PD platform support
The p1020rdb-pd has the similar feature as the p1020rdb.
Therefore, p1020rdb-pd use the same platform file as the p1/p2 rdb board.
Overview of P1020RDB-PD platform:
- DDR3 2GB
- NOR flash 64MB
- NAND flash 128MB
- SPI flash 16MB
- I2C EEPROM 256Kb
- eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch
- eTSEC2 (SGMII PHY)
- eTSEC3 (RGMII PHY)
- SDHC
- 2 USB ports
- 4 TDM ports
- PCIe
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Laurentiu TUDOR [Wed, 3 Jul 2013 14:13:15 +0000 (17:13 +0300)]
powerpc/85xx: Move ePAPR paravirt initialization earlier
At console init, when the kernel tries to flush the log buffer
the ePAPR byte-channel based console write fails silently,
losing the buffered messages.
This happens because The ePAPR para-virtualization init isn't
done early enough so that the hcall instruction to be set,
causing the byte-channel write hcall to be a nop.
To fix, change the ePAPR para-virt init to use early device
tree functions and move it in early init.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
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