Stephen Boyd [Sat, 6 Jun 2015 00:22:36 +0000 (17:22 -0700)]
Merge branch 'clk-meson8b' into clk-next
* clk-meson8b:
clk: meson8b: Add support for Meson8b clocks
clk: meson: Document bindings for Meson8b clock controller
clk: meson: Add support for Meson clock controller
Carlo Caione [Mon, 1 Jun 2015 11:13:55 +0000 (13:13 +0200)]
clk: meson8b: Add support for Meson8b clocks
This patch adds support for the basic clocks found on the Amlogic
Meson8b SoCs.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Carlo Caione [Mon, 1 Jun 2015 11:13:54 +0000 (13:13 +0200)]
clk: meson: Document bindings for Meson8b clock controller
Add documentation for the clock controller.
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Carlo Caione [Mon, 1 Jun 2015 11:13:53 +0000 (13:13 +0200)]
clk: meson: Add support for Meson clock controller
This patchset adds the infrastructure for registering and managing the
core clocks found on Amlogic MesonX SoCs. In particular:
- PLLs
- CPU clock
- Fixed rate clocks, fixed factor clocks, ...
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Uwe Kleine-König [Thu, 28 May 2015 08:45:51 +0000 (10:45 +0200)]
clk: make several parent names const
Since commit
2893c379461a ("clk: make strings in parent name arrays
const") the name of parent clocks can be const. So add more const in
several clock drivers.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Thu, 21 May 2015 07:12:52 +0000 (15:12 +0800)]
clk: mediatek: Fix apmixedsys clock registration
The size of clk_data should be the same as CLK_APMIXED_NR_CLK
instead of ARRAY_SIZE(plls). CLK_APMIXED_* is numbered from 1, so
CLK_APMIXED_NR_CLK will be greater than ARRAY_SIZE(plls).
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Fri, 29 May 2015 09:25:47 +0000 (11:25 +0200)]
clk: ti: Use of_clk_get_parent_count() instead of open coding
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Fri, 29 May 2015 09:25:46 +0000 (11:25 +0200)]
clk: st: Use of_clk_get_parent_count() instead of open coding
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Geert Uytterhoeven [Fri, 29 May 2015 09:25:45 +0000 (11:25 +0200)]
clk: at91: Use of_clk_get_parent_count() instead of open coding
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Kevin Cernekee [Tue, 26 May 2015 22:01:09 +0000 (19:01 -0300)]
clk: pistachio: Add sanity checks on PLL configuration
When setting the PLL rates, check that:
- VCO is within range
- PFD is within range
- PLL is disabled when postdiv is changed
- postdiv2 <= postdiv1
Reviewed-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Kevin Cernekee <cernekee@chromium.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ezequiel Garcia [Tue, 26 May 2015 22:01:08 +0000 (19:01 -0300)]
clk: pistachio: Lock the PLL when enabled upon rate change
Currently, when the rate is changed, the driver makes sure the
PLL is enabled before doing so. This is done because the PLL
cannot be locked while disabled. Once locked, the drivers
returns the PLL to its previous enable/disable state.
This is a bit cumbersome, and can be simplified.
This commit reworks the .set_rate() functions for the integer
and fractional PLLs. Upon rate change, the PLL is now locked
only if it's already enabled.
Also, the driver locks the PLL on .enable(). This makes sure
the PLL is locked when enabled, and not locked when disabled.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ezequiel Garcia [Tue, 26 May 2015 22:01:07 +0000 (19:01 -0300)]
clk: pistachio: Add a pll_lock() helper for clarity
This commit adds a pll_lock() helper making the code more readable.
Cosmetic change only, no functionality changes.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Chao Xie [Thu, 30 Apr 2015 01:53:42 +0000 (09:53 +0800)]
clk: mmp: add timer clock for pxa168/mmp2/pxa910
Timer has external fast clock, and it is a mux clock.
Add the timer clock type for timer driver.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Chao Xie [Thu, 30 Apr 2015 01:53:41 +0000 (09:53 +0800)]
clk: mmp: Fix the wrong factor table for uart PLL
The suggested value in the mmp2 manual is wrong.
There are only 13 bits for numerator, but some suggested
value has 14 bits.
Fix the factor tabled and remove the unused items.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Chao Xie [Thu, 30 Apr 2015 01:53:40 +0000 (09:53 +0800)]
clk: mmp: add fixed clock UBS_PLL for pxa910/pxa168
USB will drive clock from USB_PLL.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Michael Turquette [Wed, 3 Jun 2015 22:22:03 +0000 (15:22 -0700)]
Merge branch 'clk-next-hi6220' into clk-next
Conflicts:
drivers/clk/Kconfig
Mike Looijmans [Wed, 3 Jun 2015 05:25:19 +0000 (07:25 +0200)]
Add TI
CDCE925 I2C controlled clock synthesizer driver
This driver supports the TI
CDCE925 programmable clock synthesizer.
The chip contains two PLLs with spread-spectrum clocking support and
five output dividers. The driver only supports the following setup,
and uses a fixed setting for the output muxes:
Y1 is derived from the input clock
Y2 and Y3 derive from PLL1
Y4 and Y5 derive from PLL2
Given a target output frequency, the driver will set the PLL and
divider to best approximate the desired output.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Boris Brezillon [Tue, 26 May 2015 12:42:57 +0000 (14:42 +0200)]
clk: mvebu: add missing CESA gate clk
Even if not documented in the datasheet, the Armada 370 SoC can actually
gate the CESA (crypto engine) clock.
Add an entry in the gating_desc table to be able to reference the CESA
gateclk in the crypto node.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Bintian Wang [Fri, 29 May 2015 02:08:38 +0000 (10:08 +0800)]
clk: hi6220: Clock driver support for Hisilicon hi6220 SoC
Add clock drivers for hi6220 SoC, this driver controls the SoC
registers to supply different clocks to different IPs in the SoC.
We add one divider clock for hi6220 because the divider in hi6220
also has a mask bit but it doesnot obey the rule defined by flag
"CLK_DIVIDER_HIWORD_MASK", we can not get index of the mask bit by
left shift fixed bits (e.g. 16 bits), so we add this divider clock
to handle it.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Acked-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Bintian Wang [Fri, 29 May 2015 02:08:37 +0000 (10:08 +0800)]
dt-bindings: Add header file of hi6220 clock driver
Add the header file "hi6220-clock.h" used by both
hi6220 clock driver and hi6220 device tree file.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Bintian Wang [Fri, 29 May 2015 02:08:36 +0000 (10:08 +0800)]
clk: hisilicon: Remove __init for marking function prototypes
__init markings on function prototypes are useless, so remove
them.
Suggested-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Bintian Wang <bintian.wang@huawei.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Dinh Nguyen [Wed, 20 May 2015 03:22:42 +0000 (22:22 -0500)]
clk: socfpga: add a clock driver for the Arria 10 platform
The clocks on the Arria 10 platform is a bit different than the
Cyclone/Arria 5 platform that it should just have it's own
driver.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Dinh Nguyen [Wed, 20 May 2015 03:22:41 +0000 (22:22 -0500)]
clk: socfpga: update clk.h so for Arria10 platform to use
There are 5 possible parent clocks for the SoCFPGA Arria10. Move the define
SYSMGR_SDMMC_CTRL_SET and streq() to clk.h so that the Arria clock driver
can use.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Shailendra Verma [Thu, 21 May 2015 18:02:56 +0000 (23:32 +0530)]
clk: clk-conf: Fix typo in comment
Signed-off-by: Shailendra Verma <shailendra.capricorn@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Shailendra Verma [Thu, 21 May 2015 17:56:03 +0000 (23:26 +0530)]
clk: samsung: Fix typo in panic log
Signed-off-by: Shailendra Verma <shailendra.capricorn@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Axel Lin [Thu, 21 May 2015 14:26:13 +0000 (22:26 +0800)]
clk:
cdce706: Add missing of_clk_del_provider call in cdce706_remove
Remove a previously registered clock provider when unload the module.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Shailendra Verma [Wed, 20 May 2015 18:36:48 +0000 (00:06 +0530)]
clk: Fix typo in clk_register() comment
Signed-off-by: Shailendra Verma <shailendra.capricorn@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Guo Zeng [Wed, 20 May 2015 08:50:34 +0000 (08:50 +0000)]
ARM: dts: atlas7: add fixed frequency clocks in car node
This patch adds the fixed clocks of external crystal oscillators.
Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
[sboyd@codeaurora.org: Remove size-cells/address-cells]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Zhiwu Song [Wed, 20 May 2015 08:50:33 +0000 (08:50 +0000)]
clk: sirf: add CSR atlas7 clk and reset support
the hardware node includes both clock and reset support, so it
is named as "car".
this patch implements Flexible clocks(mux, divider, gate), Selectable
clock(mux, divider, gate), root clock(gate),leaf clock(gate), others.
it also implements the reset controller functionality.
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Ricky Liang [Mon, 18 May 2015 14:00:26 +0000 (22:00 +0800)]
clk: mediatek: Initialize clk_init_data
The variable init (struct clk_init_data) is allocated on the stack.
We weren't initializing the .flags field, so it contains random junk,
which can cause all kinds of interesting issues when the flags are
parsed by clk_register.
Signed-off-by: Ricky Liang <jcliang@chromium.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Rob Herring [Mon, 11 May 2015 22:25:20 +0000 (17:25 -0500)]
clk: mmp: add PXA1928 clock support
Add initial clock support for Marvell PXA1928. The PXA1928 is a mobile
SOC and is similar to other MMP/PXA series of SOCs, so a lot of the
existing infrastructure is reused here.
Currently the PLLs are just fixed clocks, and not all leaf clocks are
implemented.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Rob Herring [Mon, 11 May 2015 22:25:19 +0000 (17:25 -0500)]
dt-bindings: Add pxa1928 clock binding
This adds the clock binding documentation for the Marvell PXA1928 SOC.
The PXA1928 has 3 clock control blocks for different subsystems of the
chip.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Chanwoo Choi [Mon, 27 Apr 2015 09:29:52 +0000 (18:29 +0900)]
clk: Show correct information when fail to set clock rate
This patch shows the correct information for debugging when fail
to set clock rate because original error message shows the error
value instead of current clock rate.
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 15 May 2015 00:38:21 +0000 (17:38 -0700)]
clk: Kconfig: Move bcm Kconfig into clk menu
Having this Kconfig sourced outside the clk menu means the option
is under the "Device Drivers" menu instead of the "Common Clock
Framework" menu. Move it so that the bcm clock config options are
in the right place.
Cc: Alex Elder <elder@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 23:10:28 +0000 (16:10 -0700)]
clk: u300: Silence sparse warnings
drivers/clk/clk-u300.c:1175:13: warning: symbol 'u300_clk_init' was not declared. Should it be static?
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 23:09:33 +0000 (16:09 -0700)]
clk: moxart: Silence sparse warnings
drivers/clk/clk-moxart.c:18:13: warning: symbol 'moxart_of_pll_clk_init' was not declared. Should it be static?
drivers/clk/clk-moxart.c:56:13: warning: symbol 'moxart_of_apb_clk_init' was not declared. Should it be static?
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 21:14:57 +0000 (14:14 -0700)]
clk: xgene: Silence sparse warnings
drivers/clk/clk-xgene.c:77:43: warning: incorrect type in argument 1 (different address spaces)
drivers/clk/clk-xgene.c:77:43: expected void *csr
drivers/clk/clk-xgene.c:77:43: got void [noderef] <asn:2>*
...
drivers/clk/clk-xgene.c: In function ‘xgene_clk_enable’:
drivers/clk/clk-xgene.c:237:3: warning: format ‘%LX’ expects argument of type ‘long long unsigned int’, but argument 4 has type ‘phys_addr_t’ [-Wformat]
drivers/clk/clk-xgene.c:248:3: warning: format ‘%LX’ expects argument of type ‘long long unsigned int’, but argument 4 has type ‘phys_addr_t’ [-Wformat]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 21:03:08 +0000 (14:03 -0700)]
clk: mmp: Silence sparse warnings
drivers/clk/mmp/clk-apbc.c:118:16: warning: symbol 'clk_apbc_ops' was not declared. Should it be static?
drivers/clk/mmp/clk-apmu.c:64:16: warning: symbol 'clk_apmu_ops' was not declared. Should it be static?
Cc: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 20:11:31 +0000 (13:11 -0700)]
clk: socfpga: Silence sparse warning
drivers/clk/socfpga/clk-periph.c:79:39: warning: Using plain integer as NULL pointer
Cc: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 20:02:26 +0000 (13:02 -0700)]
clk: versatile: Silence sparse warnings
drivers/clk/versatile/clk-sp810.c:159:29: error: incompatible types for operation (<=)
drivers/clk/versatile/clk-sp810.c:159:29: left side has type char const *<noident>
drivers/clk/versatile/clk-sp810.c:159:29: right side has type int
drivers/clk/versatile/clk-sp810.c:159:53: error: incompatible types for operation (<=)
drivers/clk/versatile/clk-sp810.c:159:53: left side has type char const *<noident>
drivers/clk/versatile/clk-sp810.c:159:53: right side has type int
drivers/clk/versatile/clk-sp810.c:138:13: warning: symbol 'clk_sp810_of_setup' was not declared. Should it be static?
Acked: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:59:32 +0000 (12:59 -0700)]
clk: ti: Silence sparse warnings
drivers/clk/ti/clk.c:125:31: warning: incorrect type in return expression (different address spaces)
drivers/clk/ti/clk.c:125:31: expected void [noderef] <asn:2>*
drivers/clk/ti/clk.c:125:31: got void *
drivers/clk/ti/clk.c:132:31: warning: incorrect type in return expression (different address spaces)
drivers/clk/ti/clk.c:132:31: expected void [noderef] <asn:2>*
drivers/clk/ti/clk.c:132:31: got void *
drivers/clk/ti/dpll.c:180:14: warning: symbol '_get_reg' was not declared. Should it be static?
drivers/clk/ti/fapll.c:624:32: warning: Using plain integer as NULL pointer
drivers/clk/ti/fapll.c:625:31: warning: Using plain integer as NULL pointer
drivers/clk/ti/fapll.c:630:40: warning: Using plain integer as NULL pointer
drivers/clk/ti/clk-dra7-atl.c:158:22: warning: symbol 'atl_clk_ops' was not declared. Should it be static?
drivers/clk/ti/clk-dra7-atl.c:170:39: warning: Using plain integer as NULL pointer
Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:45:53 +0000 (12:45 -0700)]
clk: st: Silence sparse warnings
drivers/clk/st/clkgen-mux.c:134:4: warning: symbol 'clkgena_divmux_get_parent' was not declared. Should it be static?
drivers/clk/st/clkgen-mux.c:171:15: warning: symbol 'clkgena_divmux_recalc_rate' was not declared. Should it be static?
drivers/clk/st/clkgen-mux.c:218:12: warning: symbol 'clk_register_genamux' was not declared. Should it be static?
drivers/clk/st/clkgen-mux.c:388:13: warning: symbol 'st_of_clkgena_divmux_setup' was not declared. Should it be static?
drivers/clk/st/clkgen-mux.c:488:13: warning: symbol 'st_of_clkgena_prediv_setup' was not declared. Should it be static?
drivers/clk/st/clkgen-mux.c:625:13: warning: symbol 'st_of_clkgen_mux_setup' was not declared. Should it be static?
drivers/clk/st/clkgen-mux.c:702:13: warning: symbol 'st_of_clkgen_vcc_setup' was not declared. Should it be static?
drivers/clk/st/clkgen-pll.c:273:15: warning: symbol 'recalc_stm_pll800c65' was not declared. Should it be static?
drivers/clk/st/clkgen-pll.c:300:15: warning: symbol 'recalc_stm_pll1600c65' was not declared. Should it be static?
drivers/clk/st/clkgen-pll.c:324:15: warning: symbol 'recalc_stm_pll3200c32' was not declared. Should it be static?
drivers/clk/st/clkgen-pll.c:346:15: warning: symbol 'recalc_stm_pll1200c32' was not declared. Should it be static?
drivers/clk/st/clkgen-pll.c:565:19: warning: incorrect type in assignment (different address spaces)
drivers/clk/st/clkgen-pll.c:565:19: expected void [noderef] <asn:2>*reg
drivers/clk/st/clkgen-pll.c:565:19: got void *
drivers/clk/st/clkgen-pll.c:576:18: warning: incorrect type in assignment (different address spaces)
drivers/clk/st/clkgen-pll.c:576:18: expected void [noderef] <asn:2>*reg
drivers/clk/st/clkgen-pll.c:576:18: got void *
drivers/clk/st/clkgen-pll.c:693:53: warning: incorrect type in argument 2 (different address spaces)
drivers/clk/st/clkgen-pll.c:693:53: expected void *[noderef] <asn:2>reg
drivers/clk/st/clkgen-pll.c:693:53: got void [noderef] <asn:2>*[assigned] pll_base
drivers/clk/st/clkgen-fsyn.c:495:5: warning: symbol 'clk_fs660c32_vco_get_rate' was not declared. Should it be static?
drivers/clk/st/clkgen-fsyn.c:522:5: warning: symbol 'clk_fs660c32_vco_get_params' was not declared. Should it be static?
drivers/clk/st/clk-flexgen.c:119:15: warning: symbol 'flexgen_recalc_rate' was not declared. Should it be static?
drivers/clk/st/clk-flexgen.c:177:12: warning: symbol 'clk_register_flexgen' was not declared. Should it be static?
drivers/clk/st/clk-flexgen.c:263:13: warning: symbol 'st_of_flexgen_setup' was not declared. Should it be static?
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:39:52 +0000 (12:39 -0700)]
clk: socfpga: Silence sparse warning
drivers/clk/socfpga/clk-gate.c:227:40: warning: Using plain integer as NULL pointer
Cc: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:36:24 +0000 (12:36 -0700)]
clk: sirf: Silence sparse warnings
These are __iomem pointers. Mark them appropriately so we don't
get sparse errors like
drivers/clk/sirf/clk-common.c:60:16: warning: incorrect type in argument 1 (different address spaces)
drivers/clk/sirf/clk-common.c:60:16: expected void const volatile [noderef] <asn:2>*addr
drivers/clk/sirf/clk-common.c:60:16: got void *
Cc: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:33:49 +0000 (12:33 -0700)]
clk: emev2: Silence sparse warnings
drivers/clk/shmobile/clk-emev2.c:37:14: warning: symbol 'smu_base' was not declared. Should it be static?
Cc: Takashi Yoshii <takasi-y@ops.dti.ne.jp>
Cc: Magnus Damm <damm@opensource.se>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:32:17 +0000 (12:32 -0700)]
clk: samsung: Silence sparse warnings
drivers/clk/samsung/clk-exynos5260.c:138:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:328:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:392:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:494:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:583:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:644:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:779:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:898:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:962:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:1018:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:1165:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:1373:40: warning: Using plain integer as NULL pointer
drivers/clk/samsung/clk-exynos5260.c:1829:40: warning: Using plain integer as NULL pointer
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:25:53 +0000 (12:25 -0700)]
clk: hix5hd2: Silence sparse warnings
drivers/clk/hisilicon/clk-hix5hd2.c:255:13: warning: symbol 'hix5hd2_clk_register_complex' was not declared. Should it be static?
Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:24:44 +0000 (12:24 -0700)]
clk: berlin: Silence sparse warning
drivers/clk/berlin/berlin2-pll.c:94:12: warning: symbol 'berlin2_pll_register' was not declared. Should it be static?
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:23:08 +0000 (12:23 -0700)]
clk: bcm/kona: Remove ccu_list
This list doesn't look to be used. Let's remove it and any
associated code that would be manipulating this list. This also
silences this error:
drivers/clk/bcm/clk-kona-setup.c:24:1: warning: symbol 'ccu_list' was not declared. Should it be static?
Reviewed-by: Alex Elder <elder@linaro.org>
Cc: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:21:53 +0000 (12:21 -0700)]
clk: bcm/kona: Silence sparse warnings
drivers/clk/bcm/clk-kona.c:1243:16: warning: odd constant _Bool cast (
ffffffffffffffea becomes 1)
Reviewed-by: Alex Elder <elder@linaro.org>
Cc: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:17:37 +0000 (12:17 -0700)]
clk: max-gen: Silence sparse warnings
drivers/clk/clk-max-gen.c:82:16: warning: symbol 'max_gen_clk_ops' was not declared. Should it be static?
drivers/clk/clk-max-gen.c:109:5: warning: symbol 'max_gen_clk_probe' was not declared. Should it be static?
drivers/clk/clk-max-gen.c:183:5: warning: symbol 'max_gen_clk_remove' was not declared. Should it be static?
Acked-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:16:14 +0000 (12:16 -0700)]
clk: Silence sparse warnings about __clk_{get,put}()
drivers/clk/clk.c:2700:5: warning: symbol '__clk_get' was not declared. Should it be static?
drivers/clk/clk.c:2713:6: warning: symbol '__clk_put' was not declared. Should it be static?
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 1 May 2015 19:14:24 +0000 (12:14 -0700)]
clk: gpio-gate: Don't export __init functions
This function is marked as __init, so exposing it to modules
doesn't make any sense and it isn't used by modules anyway.
drivers/clk/clk-gpio-gate.c:192:13: warning: symbol 'of_gpio_gate_clk_setup' was not declared. Should it be static?
Cc: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 14 May 2015 23:47:10 +0000 (16:47 -0700)]
clk: basic-types: Remove useless allocation failure printks
Printing an error on kmalloc() failures is unnecessary. Remove
the print and use *ptr in sizeof() for future-proof code.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Krzysztof Kozlowski [Wed, 13 May 2015 06:54:40 +0000 (15:54 +0900)]
clk: ti: dra7-atl-clock: Fix possible ERR_PTR dereference
of_clk_get_from_provider() returns ERR_PTR on failure. The
dra7-atl-clock driver was not checking its return value and
immediately used it in __clk_get_hw(). __clk_get_hw()
dereferences supplied clock, if it is not NULL, so in that case
it would dereference an ERR_PTR.
Fixes: 9ac33b0ce81f ("CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic)")
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Alexander Sverdlin [Wed, 13 May 2015 16:27:40 +0000 (18:27 +0200)]
clk: axm55xx: Use %zu in pr_info for size_t
Fix the following compiler warning:
drivers/clk/clk-axm5516.c: In function 'axmclk_probe':
drivers/clk/clk-axm5516.c:559:2: warning: format '%u' expects argument of type 'unsigned int', but argument 2 has type 'size_t' [-Wformat=]
pr_info("axmclk: supporting %u clocks\n", num_clks);
^
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Maxime Ripard [Sat, 2 May 2015 15:03:21 +0000 (17:03 +0200)]
clk: asm9260: Fix of_io_request_and_map error check
of_io_request_and map returns an error pointer, but the current code assumes
that on error the returned pointer will be NULL.
Obviously, that makes the check completely useless. Change the test to actually
check for the proper error code.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Daniel Thompson [Mon, 11 May 2015 10:20:06 +0000 (11:20 +0100)]
clk: Update docs after removal of clk-private.h
Currently Documentation/clk.txt describes an obsolete techinique to
statically define struct clk objects.
This capability was removed by
b09d6d991025("clk: remove clk-private.h")
and is no longer supported. The documentation describing the feature should
be removed.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Michael Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Fri, 8 May 2015 06:43:26 +0000 (23:43 -0700)]
clk: bindings: Fix assigned-clock-rates description
The binding uses assigned-clock-parents when it should use
assigned-clock-rates. Furthermore, the part that describes how
they relate to the assigned-clocks property is not clear about
what is related. Correct and clarify this part of the binding.
Reported-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Sergej Sawazki [Mon, 11 May 2015 08:44:59 +0000 (10:44 +0200)]
clk: si5351: fix .recalc_rate for multisynth 6-7
MS6 and MS7 do not have the MSx_P3 field. Do the 'params.p3 == 0'
check for MS0-M5 only. See [AN619, p. 6] for details.
Referenced document:
[AN619] Manually Generating an Si5351 Register Map, Rev. 0.4
Signed-off-by: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Sergej Sawazki [Mon, 11 May 2015 08:44:50 +0000 (10:44 +0200)]
clk: si5351: fix .round_rate for multisynth 6-7
The divider calculation for multisynth 6 and 7 differs from the
calculation for multisynth 0-5.
For MS6 and MS7, set MSx_P1 directly, MSx_P1=divide value
[AN619, p. 6].
Referenced document:
[AN619] Manually Generating an Si5351 Register Map, Rev. 0.4
Signed-off-by: Sergej Sawazki <ce3a@gmx.de>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Michael Turquette [Fri, 8 May 2015 18:57:23 +0000 (11:57 -0700)]
Merge branch 'clk-fixes' into clk-next
Sebastian Hesselbarth [Mon, 4 May 2015 21:04:16 +0000 (23:04 +0200)]
clk: si5351: Do not pass struct clk in platform_data
When registering clk-si5351 by platform_data, we should not pass struct clk
for the reference clocks. Drop struct clk from platform_data and rework the
driver to use devm_clk_get of named clock references.
While at it, check for at least one valid input clock and properly prepare/
enable valid reference clocks.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Reported-by: Michael Welling <mwelling@ieee.org>
Reported-by: Jean-Francois Moine <moinejf@free.fr>
Reported-by: Russell King <rmk+linux@arm.linux.org.uk>
Tested-by: Michael Welling <mwelling@ieee.org>
Tested-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Sebastian Hesselbarth [Mon, 4 May 2015 21:04:14 +0000 (23:04 +0200)]
clk: si5351: Mention clock-names in the binding documentation
Since the introduction of clk-si5351 the way we should deal with DT provided
clocks has changed from indexed to named clock phandles. Amend the binding
documentation to reflect named clock phandles by clock-names property.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Michael Turquette [Thu, 7 May 2015 23:46:26 +0000 (16:46 -0700)]
Merge tag 'clk-samsung-fixes-4.1-2' of git://linuxtv.org/snawrocki/samsung into clk-fixes
clk/samsung fixes for 4.1
- missing CONFIG_ARCH_EXYNOS5433 -> CONFIG_ARCH_EXYNOS substitution
to actually enable clk-exynos5433.c compilation,
- fixes of exynos5433 clk tree definitions: register offsetts, parent
clocks, PLL coefficients,
- fix for exynos5420 system sleep regression introduced in 3.19.
Sascha Hauer [Thu, 7 May 2015 08:14:58 +0000 (10:14 +0200)]
dt-bindings: ARM: Mediatek: use more generic node name in examples
Use 'clock-controller' and 'power-controller' as node names in the
examples rather than the specific names of the units.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 7 May 2015 00:00:54 +0000 (17:00 -0700)]
clk: Add some more lockdep assertions
We don't check to make sure the enable_lock is held across
enable/disable and we don't check if the prepare_lock is held
across prepare/unprepare. Add some asserts to catch any future
locking problems.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 7 May 2015 18:32:49 +0000 (11:32 -0700)]
Merge branch 'clk-fixes' into clk-next
Geert Uytterhoeven [Mon, 27 Apr 2015 12:51:33 +0000 (14:51 +0200)]
clk: emev2: Use generic names for device nodes
uart -> serial
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Linus Walleij [Mon, 20 Apr 2015 13:06:28 +0000 (15:06 +0200)]
clk: ux500: ape[ate|trace]clk are scaleable
The APEATCLK and APETRACECLK are actually scaleable so register
them as scaleable clocks.
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Felipe Balbi [Fri, 1 May 2015 14:48:37 +0000 (09:48 -0500)]
clk: add newline character after dumping all clocks
clk_dump() will dump data about all clocks in JSON
format, but it misses a newline character at the
end of the JSON string. This patch adds that missing
newline character.
Signed-off-by: Felipe Balbi <balbi@ti.com>
[sboyd@codeaurora.org: Squelch checkpatch with seq_puts()]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Dong Aisheng [Wed, 15 Apr 2015 14:26:36 +0000 (22:26 +0800)]
clk: add missing lock when call clk_core_enable in clk_set_parent
Before commit
035a61c314eb ("clk: Make clk API return per-user
struct clk instances") we acquired the enable_lock in
__clk_set_parent_{before,after}() by means of calling
clk_enable(). After commit
035a61c314eb we use clk_core_enable()
in place of the clk_enable(), and clk_core_enable() doesn't
acquire the enable_lock. This opens up a race condition between
clk_set_parent() and clk_enable(). Fix it.
Fixes: 035a61c314eb ("clk: Make clk API return per-user struct clk instances")
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Krzysztof Kozlowski [Fri, 1 May 2015 16:02:48 +0000 (01:02 +0900)]
clk: s3c2410: Constify platform_device_id
The platform_device_id is not modified by the driver and core uses it as
const.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Krzysztof Kozlowski [Fri, 1 May 2015 16:02:47 +0000 (01:02 +0900)]
clk: s3c2410: Staticize local symbols
Staticize symbols not exported and not used outside of file.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Krzysztof Kozlowski [Tue, 28 Apr 2015 04:46:22 +0000 (13:46 +0900)]
clk: ls1x: Fix duplicate const for parent names
Replace duplicated const keyword with proper array of const pointers to
const strings.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Krzysztof Kozlowski [Tue, 28 Apr 2015 04:46:21 +0000 (13:46 +0900)]
clk: sirf: Constify parent names in clock init data
The array of parent names can be made as array of const pointers to
const strings.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Krzysztof Kozlowski [Tue, 28 Apr 2015 04:46:20 +0000 (13:46 +0900)]
clk:
cdce706: Constify parent names in clock init data
The array of parent names can be made as array of const pointers to
const strings.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Krzysztof Kozlowski [Tue, 28 Apr 2015 04:46:17 +0000 (13:46 +0900)]
clk: exynos: Staticize file-scope declarations
Add missing static to local (file-scope only) symbols.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Krzysztof Kozlowski [Tue, 28 Apr 2015 04:46:16 +0000 (13:46 +0900)]
clk: rockchip: Staticize file-scope declarations
Add missing static to local (file-scope only) symbols.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Sascha Hauer [Thu, 23 Apr 2015 08:35:43 +0000 (10:35 +0200)]
dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers
This adds the binding documentation for the apmixedsys, perisys and
infracfg controllers found on Mediatek SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Thu, 23 Apr 2015 08:35:42 +0000 (10:35 +0200)]
clk: mediatek: Add basic clocks for Mediatek MT8173.
This patch adds basic clocks for MT8173, including TOPCKGEN, PLLs,
INFRA and PERI clocks.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Thu, 23 Apr 2015 08:35:41 +0000 (10:35 +0200)]
clk: mediatek: Add basic clocks for Mediatek MT8135.
This patch adds basic clocks for MT8135, including TOPCKGEN, PLLs,
INFRA and PERI clocks.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Sascha Hauer [Thu, 23 Apr 2015 08:35:40 +0000 (10:35 +0200)]
clk: mediatek: Add reset controller support
The pericfg and infracfg units also provide reset lines to several
other SoC internal units. This adds a function which can be called
from the pericfg and infracfg initialization functions which will
register the reset controller using reset_controller_register. The
reset controller will provide support for resetting the units
connected to the pericfg and infracfg controller. The units resetted
by this controller can use the standard reset device tree binding
to gain access to the reset lines.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
James Liao [Thu, 23 Apr 2015 08:35:39 +0000 (10:35 +0200)]
clk: mediatek: Add initial common clock support for Mediatek SoCs.
This patch adds common clock support for Mediatek SoCs, including plls,
muxes and clock gates.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[sboyd@codeaurora.org: Squelch checkpatch warning in clk-mtk.h]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Sascha Hauer [Tue, 31 Mar 2015 18:16:52 +0000 (20:16 +0200)]
clk: make strings in parent name arrays const
The clk functions and structs declare the parent_name arrays as
'const char **parent_names' which means the parent name strings
are const, but the array itself is not. Use
'const char * const * parent_names' instead which also makes
the array const. This allows us to put the parent_name arrays into
the __initconst section.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
[sboyd@codeaurora.org: Squelch 80-character checkpatch warnings]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Javier Martinez Canillas [Wed, 8 Apr 2015 05:34:12 +0000 (07:34 +0200)]
clk: exynos5420: Restore GATE_BUS_TOP on suspend
Commit
ae43b3289186 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power
Management support v12") added pm support for the pl330 dma driver but
it makes the clock for the Exynos5420 MDMA0 DMA controller to be gated
during suspend and this in turn makes its parent clock aclk266_g2d to
be gated. But the clock needs to be ungated prior suspend to allow the
system to be suspend and resumed correctly.
Add GATE_BUS_TOP register to the list of registers to be restored when
the system enters into a suspend state so aclk266_g2d will be ungated.
Thanks to Abhilash Kesavan for figuring out that this was the issue.
Fixes: ae43b32 ("ARM: 8202/1: dmaengine: pl330: Add runtime Power Management support v12")
Cc: stable@vger.kernel.org # 3.19+
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Abhilash Kesavan <a.kesavan@samsung.com>
Acked-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Stephen Boyd [Sat, 2 May 2015 01:25:10 +0000 (18:25 -0700)]
Merge branch 'clk-fixes' into clk-next
Krzysztof Kozlowski [Mon, 27 Apr 2015 12:52:38 +0000 (21:52 +0900)]
clk: at91: Constify irq_domain_ops
The irq_domain_ops are not modified by the driver and the irqdomain core
code accepts pointer to a const data.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stefan Wahren [Wed, 29 Apr 2015 16:36:43 +0000 (16:36 +0000)]
clk: Fix JSON output in debugfs
key/value pairs in a JSON object must be separated by a comma.
After adding the properties "accuracy" and "phase" the JSON output
of /sys/kernel/debug/clk/clk_dump is invalid.
So add the missing commas to fix it.
Fixes: 5279fc402ae5 ("clk: add clk accuracy retrieval support")
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
[sboyd@codeaurora.org: Added comment in function]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Georgi Djakov [Wed, 29 Apr 2015 11:52:47 +0000 (14:52 +0300)]
clk: qcom: Fix MSM8916 gfx3d_clk_src configuration
The gfx3d_clk_src parents configuration is incorrect. Fix it.
Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Georgi Djakov [Wed, 29 Apr 2015 11:52:46 +0000 (14:52 +0300)]
clk: qcom: Fix MSM8916 venus divider value
One of the video codec clock frequencies has incorrect divider
value. Fix it.
Fixes: 3966fab8b6ab "clk: qcom: Add MSM8916 Global Clock Controller support"
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 30 Apr 2015 22:11:31 +0000 (15:11 -0700)]
clk: Update some comments to reflect reality
The debugfs clk directory no longer expresses a clk tree. Update
the comments around that apporiately. Also drop comments about
prepare locks needing to be held as we have the proper
annotations with lockdep_assert_held().
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 30 Apr 2015 21:43:22 +0000 (14:43 -0700)]
clk: Remove forward declared function prototypes
Move the code around so that we don't need to declare function
prototypes at the start of the file. Simplify
clk_core_is_prepared() and clk_core_is_enabled() too to make the
diff easier to read.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 30 Apr 2015 21:21:56 +0000 (14:21 -0700)]
clk: Remove impossible if condition in clk_core_get_phase()
This condition can't ever be true because this function is static
and it's always called with a non-NULL pointer.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 30 Apr 2015 21:04:53 +0000 (14:04 -0700)]
clk: Drop unnecessary OOM prints
We don't need to print error messages when allocations fail.
We'll get a nice backtrace in such situations anyway.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Dong Aisheng [Thu, 30 Apr 2015 21:02:19 +0000 (14:02 -0700)]
clk: Squash __clk_{enable,disable}() into callers
These functions are only used in one place. Let's squash them
into their respective callers to save some lines.
Signed-off-by: Dong Aisheng <aisheng.dong@freescale.com>
[sboyd@codeaurora.org: Redo commit text, add NULL check in
clk_enable()]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Stephen Boyd [Thu, 30 Apr 2015 20:54:13 +0000 (13:54 -0700)]
clk: s/clk/core/ for struct clk_core
While introducing struct clk_core we tried to minimize the diff
by changing the type of 'clk' variables from struct clk to struct
clk_core without changing the names of the variables. Now that
the split is complete, the code is slightly confusing when it
mixes variables called 'clk' and variables called 'core' that are
of the same type struct clk_core. Let's be consistent and use
'core' everywhere we have a struct clk_core pointer and 'clk'
when we have a struct clk pointer.
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Chanwoo Choi [Mon, 27 Apr 2015 11:36:32 +0000 (20:36 +0900)]
clk: exynos5433: Fix wrong PMS value of exynos5433_pll_rates
This patch fixes the wrong PMS value of exynos5433_pll_rates table
for {ATLAS|APOLLO|MEM0|MEM1|BUS|MFC|MPHY|G3D|DISP|ISP|_PLL.
- 720 MHz (mdiv=360, pdiv=6, sdiv=1) -> 700 MHz (mdiv=175, pdiv=3, sdiv=1)
- 350 MHz (mdiv=360, pdiv=6, sdiv=2) -> (mdiv=350, pdiv=6, sdiv=2)
- 133 MHz (mdiv=552, pdiv=6, sdiv=4) -> (mdiv=532, pdiv=6, sdiv=4)
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Chanwoo Choi [Mon, 27 Apr 2015 11:36:31 +0000 (20:36 +0900)]
clk: exynos5433: Fix wrong parent clock of sclk_apollo clock
This patch fixes the wrong parent clock of sclk_apollo clock
from 'div_apollo_pll' to 'div_apollo2'.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Jonghwa Lee [Mon, 27 Apr 2015 11:36:30 +0000 (20:36 +0900)]
clk: exynos5433: Fix CLK_PCLK_MONOTONIC_CNT clk register assignment
CLK_PCLK_MONOTONIC_CNT clock had a wrong register assigned to it.
The correct register is ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT.
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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