From 0ea9d7bc701003282c695efebc4bcfc10ab5df17 Mon Sep 17 00:00:00 2001 From: Joern Rennecke Date: Fri, 3 Jul 1998 13:40:08 +0000 Subject: [PATCH] Brought over from sh4-980527-branch: Fix for execute/921208-1.c -Os -mrelax -m4-single failure: * coff-sh.c (sh_insns_conflict): Load of fpscr conflicts with floating point operations. --- bfd/ChangeLog | 5 +++++ bfd/coff-sh.c | 6 ++++++ 2 files changed, 11 insertions(+) diff --git a/bfd/ChangeLog b/bfd/ChangeLog index c92ead4382..92c5b4211f 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,8 @@ +Fri Jul 3 14:35:48 1997 J"orn Rennecke + + * coff-sh.c (sh_insns_conflict): Load of fpscr conflicts with + floating point operations. + Thu Jul 2 18:37:25 1998 Ian Lance Taylor * cofflink.c (_bfd_coff_link_input_bfd): Skip undefined global diff --git a/bfd/coff-sh.c b/bfd/coff-sh.c index ca68c564c7..29c0dcf396 100644 --- a/bfd/coff-sh.c +++ b/bfd/coff-sh.c @@ -1952,6 +1952,12 @@ sh_insns_conflict (i1, op1, i2, op2) f1 = op1->flags; f2 = op2->flags; + /* Load of fpscr conflicts with floating point operations. + FIXME: shouldn't test raw opcodes here. */ + if (((i1 & 0xf0ff) == 0x4066 && (i2 & 0xf000) == 0xf000) + || ((i2 & 0xf0ff) == 0x4066 && (i1 & 0xf000) == 0xf000)) + return true; + if ((f1 & (BRANCH | DELAY)) != 0 || (f2 & (BRANCH | DELAY)) != 0) return true; -- 2.34.1