From fd63f640f645878605e4b4bc33ca31fb51583ecd Mon Sep 17 00:00:00 2001 From: Vinay Date: Mon, 23 Feb 2015 17:16:30 +0000 Subject: [PATCH] Adds a space between the operands of the RL78's MOV instruction for consistency with the disassembling of other instructions. * rl78-decode.opc (MOV): Added space between two operands for 'mov' instruction in index addressing mode. * rl78-decode.c: Regenerate. --- opcodes/ChangeLog | 6 ++++++ opcodes/rl78-decode.c | 12 ++++++------ opcodes/rl78-decode.opc | 4 ++-- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ddb04b8843..90b4eaf860 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2015-02-23 Vinay + + * rl78-decode.opc (MOV): Added space between two operands for + 'mov' instruction in index addressing mode. + * rl78-decode.c: Regenerate. + 2015-02-19 Pedro Alves * microblaze-dis.h [__cplusplus]: Wrap in extern "C". diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c index 7b35ecc245..f4d8ef324a 100644 --- a/opcodes/rl78-decode.c +++ b/opcodes/rl78-decode.c @@ -4490,14 +4490,14 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0x99: { - /** 1001 1001 mov %e0,%1 */ + /** 1001 1001 mov %e0, %1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1001 1001 mov %e0,%1 */", + "/** 1001 1001 mov %e0, %1 */", op[0]); } - SYNTAX("mov %e0,%1"); + SYNTAX("mov %e0, %1"); #line 614 "rl78-decode.opc" ID(mov); DM(DE, 0); SR(A); @@ -4520,14 +4520,14 @@ rl78_decode_opcode (unsigned long pc AU, break; case 0x9b: { - /** 1001 1011 mov %e0,%1 */ + /** 1001 1011 mov %e0, %1 */ if (trace) { printf ("\033[33m%s\033[0m %02x\n", - "/** 1001 1011 mov %e0,%1 */", + "/** 1001 1011 mov %e0, %1 */", op[0]); } - SYNTAX("mov %e0,%1"); + SYNTAX("mov %e0, %1"); #line 623 "rl78-decode.opc" ID(mov); DM(HL, 0); SR(A); diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc index 6612e48b55..fc0dea5c3c 100644 --- a/opcodes/rl78-decode.opc +++ b/opcodes/rl78-decode.opc @@ -610,7 +610,7 @@ rl78_decode_opcode (unsigned long pc AU, /** 1001 1111 mov %e!0, %1 */ ID(mov); DM(None, IMMU(2)); SR(A); -/** 1001 1001 mov %e0,%1 */ +/** 1001 1001 mov %e0, %1 */ ID(mov); DM(DE, 0); SR(A); /** 1100 1010 mov %e0, #%1 */ @@ -619,7 +619,7 @@ rl78_decode_opcode (unsigned long pc AU, /** 1001 1010 mov %e0, %1 */ ID(mov); DM(DE, IMMU(1)); SR(A); -/** 1001 1011 mov %e0,%1 */ +/** 1001 1011 mov %e0, %1 */ ID(mov); DM(HL, 0); SR(A); /** 0110 0001 1101 1001 mov %e0, %1 */ -- 2.34.1