From 9494d739022dc483721f8dc97e19085977e78b38 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Mon, 4 Apr 2005 10:09:52 +0000 Subject: [PATCH] Initialise value to zero to avoid a compile time warning. --- opcodes/ChangeLog | 8 ++++++++ opcodes/fr30-asm.c | 4 ++-- opcodes/frv-asm.c | 4 ++-- opcodes/iq2000-asm.c | 7 +++---- opcodes/m32r-asm.c | 8 ++++---- opcodes/openrisc-asm.c | 4 ++-- 6 files changed, 21 insertions(+), 14 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d289c15085..5a25ae39ff 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2005-04-04 Nick Clifton + + * fr30-asm.c: Regenerate. + * frv-asm.c: Regenerate. + * iq2000-asm.c: Regenerate. + * m32r-asm.c: Regenerate. + * openrisc-asm.c: Regenerate. + 2005-04-01 Jan Beulich * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any diff --git a/opcodes/fr30-asm.c b/opcodes/fr30-asm.c index abcdc9b16a..234870b213 100644 --- a/opcodes/fr30-asm.c +++ b/opcodes/fr30-asm.c @@ -269,14 +269,14 @@ fr30_cgen_parse_operand (cd, opindex, strp, fields) break; case FR30_OPERAND_LABEL12 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL12, 0, NULL, & value); fields->f_rel12 = value; } break; case FR30_OPERAND_LABEL9 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL9, 0, NULL, & value); fields->f_rel9 = value; } diff --git a/opcodes/frv-asm.c b/opcodes/frv-asm.c index 2632e87777..ad4d81f959 100644 --- a/opcodes/frv-asm.c +++ b/opcodes/frv-asm.c @@ -1229,14 +1229,14 @@ frv_cgen_parse_operand (cd, opindex, strp, fields) break; case FRV_OPERAND_LABEL16 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, FRV_OPERAND_LABEL16, 0, NULL, & value); fields->f_label16 = value; } break; case FRV_OPERAND_LABEL24 : { - bfd_vma value; + bfd_vma value = 0; errmsg = parse_call_label (cd, strp, FRV_OPERAND_LABEL24, 0, NULL, & value); fields->f_label24 = value; } diff --git a/opcodes/iq2000-asm.c b/opcodes/iq2000-asm.c index 38d803a864..c6205b7dac 100644 --- a/opcodes/iq2000-asm.c +++ b/opcodes/iq2000-asm.c @@ -358,7 +358,7 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) break; case IQ2000_OPERAND_BASEOFF : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value); fields->f_imm = value; } @@ -401,7 +401,7 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) break; case IQ2000_OPERAND_JMPTARG : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value); fields->f_jtarg = value; } @@ -409,7 +409,6 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) case IQ2000_OPERAND_JMPTARGQ10 : { bfd_vma value = 0; - errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value); fields->f_jtargq10 = value; } @@ -434,7 +433,7 @@ iq2000_cgen_parse_operand (cd, opindex, strp, fields) break; case IQ2000_OPERAND_OFFSET : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value); fields->f_offset = value; } diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index 8cfc5fdd77..1c0944afe5 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -255,21 +255,21 @@ m32r_cgen_parse_operand (cd, opindex, strp, fields) break; case M32R_OPERAND_DISP16 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value); fields->f_disp16 = value; } break; case M32R_OPERAND_DISP24 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value); fields->f_disp24 = value; } break; case M32R_OPERAND_DISP8 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value); fields->f_disp8 = value; } @@ -312,7 +312,7 @@ m32r_cgen_parse_operand (cd, opindex, strp, fields) break; case M32R_OPERAND_UIMM24 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value); fields->f_uimm24 = value; } diff --git a/opcodes/openrisc-asm.c b/opcodes/openrisc-asm.c index d845876b4b..7e9616da2f 100644 --- a/opcodes/openrisc-asm.c +++ b/opcodes/openrisc-asm.c @@ -201,14 +201,14 @@ openrisc_cgen_parse_operand (cd, opindex, strp, fields) { case OPENRISC_OPERAND_ABS_26 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, OPENRISC_OPERAND_ABS_26, 0, NULL, & value); fields->f_abs26 = value; } break; case OPENRISC_OPERAND_DISP_26 : { - bfd_vma value; + bfd_vma value = 0; errmsg = cgen_parse_address (cd, strp, OPENRISC_OPERAND_DISP_26, 0, NULL, & value); fields->f_disp26 = value; } -- 2.34.1