From 7148c36989ee64f15ac9618543309cd7311b6015 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 3 Nov 2016 08:38:13 -0700 Subject: [PATCH] X86: Rename REG_82 to REG_83 The REG_82 entry in x86 disassembler is for opcode 0x83, not opcode 0x82. * i386-dis.c (REG_82): Renamed to ... (REG_83): This. (dis386): Updated. (reg_table): Likewise. --- opcodes/ChangeLog | 7 +++++++ opcodes/i386-dis.c | 6 +++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 60938433bc..813181764b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2016-11-03 H.J. Lu + + * i386-dis.c (REG_82): Renamed to ... + (REG_83): This. + (dis386): Updated. + (reg_table): Likewise. + 2016-11-02 Igor Tsimbalist * i386-dis.c (enum): Add PREFIX_EVEX_0F3852, PREFIX_EVEX_0F3853. diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 56b34075ba..8fb607cef5 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -706,7 +706,7 @@ enum { REG_80 = 0, REG_81, - REG_82, + REG_83, REG_8F, REG_C0, REG_C1, @@ -2663,7 +2663,7 @@ static const struct dis386 dis386[] = { { REG_TABLE (REG_80) }, { REG_TABLE (REG_81) }, { Bad_Opcode }, - { REG_TABLE (REG_82) }, + { REG_TABLE (REG_83) }, { "testB", { Eb, Gb }, 0 }, { "testS", { Ev, Gv }, 0 }, { "xchgB", { Ebh2, Gb }, 0 }, @@ -3400,7 +3400,7 @@ static const struct dis386 reg_table[][8] = { { "xorQ", { Evh1, Iv }, 0 }, { "cmpQ", { Ev, Iv }, 0 }, }, - /* REG_82 */ + /* REG_83 */ { { "addQ", { Evh1, sIb }, 0 }, { "orQ", { Evh1, sIb }, 0 }, -- 2.34.1