From 151fa98f806158456f5293638145fadb93bbb068 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Mon, 25 Feb 2013 18:41:06 +0000 Subject: [PATCH] * rl78-decode.opc: Fix encoding of DIVWU insn. * rl78-decode.c: Regenerate. * config/rl78-parse.y: Fix encoding of DIVWU insn. --- gas/ChangeLog | 4 ++++ gas/config/rl78-parse.y | 10 +++++++--- opcodes/ChangeLog | 5 +++++ opcodes/rl78-decode.c | 10 ++++++---- opcodes/rl78-decode.opc | 7 +++++-- 5 files changed, 27 insertions(+), 9 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index f9c8618a02..0014922e89 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,7 @@ +2013-02-25 Kaushik Phatak + + * config/rl78-parse.y: Fix encoding of DIVWU insn. + 2013-02-25 Terry Guo * config/tc-arm.c (arm_cpus): Add cortex-r7 entry. diff --git a/gas/config/rl78-parse.y b/gas/config/rl78-parse.y index b487312f5a..1f01920ce0 100644 --- a/gas/config/rl78-parse.y +++ b/gas/config/rl78-parse.y @@ -1,6 +1,5 @@ /* rl78-parse.y Renesas RL78 parser - Copyright 2011 - Free Software Foundation, Inc. + Copyright 2011-2013 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -513,8 +512,13 @@ statement : | DIVHU { B3 (0xce, 0xfb, 0x03); } +/* Note that the DIVWU encoding was changed from [0xce,0xfb,0x04] to + [0xce,0xfb,0x0b]. Different versions of the Software Manual exist + with the same version number, but varying encodings. The version + here matches the hardware. */ + | DIVWU - { B3 (0xce, 0xfb, 0x04); } + { B3 (0xce, 0xfb, 0x0b); } | MACHU { B3 (0xce, 0xfb, 0x05); } diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3e75abf35d..fdb1ed618f 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2013-02-25 Kaushik Phatak + + * rl78-decode.opc: Fix encoding of DIVWU insn. + * rl78-decode.c: Regenerate. + 2013-02-19 H.J. Lu PR gas/15159 diff --git a/opcodes/rl78-decode.c b/opcodes/rl78-decode.c index fab973cb9b..46531f5b3f 100644 --- a/opcodes/rl78-decode.c +++ b/opcodes/rl78-decode.c @@ -1,6 +1,6 @@ #line 1 "rl78-decode.opc" /* -*- c -*- */ -/* Copyright 2012 Free Software Foundation, Inc. +/* Copyright 2012-2013 Free Software Foundation, Inc. Contributed by Red Hat. Written by DJ Delorie. @@ -5167,7 +5167,7 @@ rl78_decode_opcode (unsigned long pc AU, rl78->syntax = "divhu"; ID(divhu); break; case 0x04: - rl78->syntax = "divwu"; ID(divwu); + rl78->syntax = "divwu "; ID(divwu); break; case 0x05: rl78->syntax = "machu"; ID(machu); @@ -5175,9 +5175,11 @@ rl78_decode_opcode (unsigned long pc AU, case 0x06: rl78->syntax = "mach"; ID(mach); break; + case 0x0b: + rl78->syntax = "divwu"; ID(divwu); + break; } - - } + } break; case 0xcf: { diff --git a/opcodes/rl78-decode.opc b/opcodes/rl78-decode.opc index 11bfc4e821..901e1b3930 100644 --- a/opcodes/rl78-decode.opc +++ b/opcodes/rl78-decode.opc @@ -1,5 +1,5 @@ /* -*- c -*- */ -/* Copyright 2012 Free Software Foundation, Inc. +/* Copyright 2012-2013 Free Software Foundation, Inc. Contributed by Red Hat. Written by DJ Delorie. @@ -762,7 +762,7 @@ rl78_decode_opcode (unsigned long pc AU, rl78->syntax = "divhu"; ID(divhu); break; case 0x04: - rl78->syntax = "divwu"; ID(divwu); + rl78->syntax = "divwu " ID(divwu); break; case 0x05: rl78->syntax = "machu"; ID(machu); @@ -770,6 +770,9 @@ rl78_decode_opcode (unsigned long pc AU, case 0x06: rl78->syntax = "mach"; ID(mach); break; + case 0x0b: + rl78->syntax = "divwu"; ID(divwu); + break; } /** 1001 1110 mov %0, %1 */ -- 2.34.1