From 12df9c50568a08db0b38fb70f088b80ec2793191 Mon Sep 17 00:00:00 2001 From: Yakir Yang Date: Mon, 15 Feb 2016 19:01:43 +0800 Subject: [PATCH] dt-bindings: add document for rockchip dp phy Add dt binding documentation for rockchip display port PHY. Signed-off-by: Yakir Yang Acked-by: Rob Herring Reviewed-by: Heiko Stuebner Signed-off-by: Kishon Vijay Abraham I --- .../bindings/phy/rockchip-dp-phy.txt | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt new file mode 100644 index 000000000000..50c4f9b00adf --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt @@ -0,0 +1,22 @@ +Rockchip specific extensions to the Analogix Display Port PHY +------------------------------------ + +Required properties: +- compatible : should be one of the following supported values: + - "rockchip.rk3288-dp-phy" +- clocks: from common clock binding: handle to dp clock. + of memory mapped region. +- clock-names: from common clock binding: + Required elements: "24m" +- rockchip,grf: phandle to the syscon managing the "general register files" +- #phy-cells : from the generic PHY bindings, must be 0; + +Example: + +edp_phy: edp-phy { + compatible = "rockchip,rk3288-dp-phy"; + rockchip,grf = <&grf>; + clocks = <&cru SCLK_EDP_24M>; + clock-names = "24m"; + #phy-cells = <0>; +}; -- 2.34.1