From 18221b8259a1987a49db41e26a7d60f183ca9f92 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Mon, 17 Nov 2014 17:47:00 +0100 Subject: [PATCH] ARM: STi: DT: STiH416: Add DT nodes for the ehci and ohci usb controllers. This patch adds the DT nodes for the 4 usb ehci and ohci usb controllers on the stih416 SoC. Signed-off-by: Peter Griffin Signed-off-by: Maxime Coquelin --- arch/arm/boot/dts/stih416.dtsi | 121 +++++++++++++++++++++++++++++++++ 1 file changed, 121 insertions(+) diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index ff2ad35a5aa2..2bdda522c4f0 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -324,5 +324,126 @@ clocks = <&clk_sysin>; clock-names = "osc_phy"; }; + + ehci0: usb@fe1ffe00 { + compatible = "st,st-ehci-300x"; + reg = <0xfe1ffe00 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0>; + clocks = <&clk_s_a1_ls 0>, + <&clockgen_b0 0>; + clock-names = "ic", "clk48"; + phys = <&usb2_phy>; + phy-names = "usb"; + resets = <&powerdown STIH416_USB0_POWERDOWN>, + <&softreset STIH416_USB0_SOFTRESET>; + reset-names = "power", "softreset"; + }; + + ohci0: usb@fe1ffc00 { + compatible = "st,st-ohci-300x"; + reg = <0xfe1ffc00 0x100>; + interrupts = ; + clocks = <&clk_s_a1_ls 0>, + <&clockgen_b0 0>; + clock-names = "ic", "clk48"; + phys = <&usb2_phy>; + phy-names = "usb"; + status = "okay"; + resets = <&powerdown STIH416_USB0_POWERDOWN>, + <&softreset STIH416_USB0_SOFTRESET>; + reset-names = "power", "softreset"; + }; + + ehci1: usb@fe203e00 { + compatible = "st,st-ehci-300x"; + reg = <0xfe203e00 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1>; + clocks = <&clk_s_a1_ls 0>, + <&clockgen_b0 0>; + clock-names = "ic", "clk48"; + phys = <&usb2_phy>; + phy-names = "usb"; + resets = <&powerdown STIH416_USB1_POWERDOWN>, + <&softreset STIH416_USB1_SOFTRESET>; + reset-names = "power", "softreset"; + }; + + ohci1: usb@fe203c00 { + compatible = "st,st-ohci-300x"; + reg = <0xfe203c00 0x100>; + interrupts = ; + clocks = <&clk_s_a1_ls 0>, + <&clockgen_b0 0>; + clock-names = "ic", "clk48"; + phys = <&usb2_phy>; + phy-names = "usb"; + resets = <&powerdown STIH416_USB1_POWERDOWN>, + <&softreset STIH416_USB1_SOFTRESET>; + reset-names = "power", "softreset"; + }; + + ehci2: usb@fe303e00 { + compatible = "st,st-ehci-300x"; + reg = <0xfe303e00 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb2>; + clocks = <&clk_s_a1_ls 0>, + <&clockgen_b0 0>; + clock-names = "ic", "clk48"; + phys = <&usb2_phy>; + phy-names = "usb"; + resets = <&powerdown STIH416_USB2_POWERDOWN>, + <&softreset STIH416_USB2_SOFTRESET>; + reset-names = "power", "softreset"; + }; + + ohci2: usb@fe303c00 { + compatible = "st,st-ohci-300x"; + reg = <0xfe303c00 0x100>; + interrupts = ; + clocks = <&clk_s_a1_ls 0>, + <&clockgen_b0 0>; + clock-names = "ic", "clk48"; + phys = <&usb2_phy>; + phy-names = "usb"; + resets = <&powerdown STIH416_USB2_POWERDOWN>, + <&softreset STIH416_USB2_SOFTRESET>; + reset-names = "power", "softreset"; + }; + + ehci3: usb@fe343e00 { + compatible = "st,st-ehci-300x"; + reg = <0xfe343e00 0x100>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb3>; + clocks = <&clk_s_a1_ls 0>, + <&clockgen_b0 0>; + clock-names = "ic", "clk48"; + phys = <&usb2_phy>; + phy-names = "usb"; + resets = <&powerdown STIH416_USB3_POWERDOWN>, + <&softreset STIH416_USB3_SOFTRESET>; + reset-names = "power", "softreset"; + }; + + ohci3: usb@fe343c00 { + compatible = "st,st-ohci-300x"; + reg = <0xfe343c00 0x100>; + interrupts = ; + clocks = <&clk_s_a1_ls 0>, + <&clockgen_b0 0>; + clock-names = "ic", "clk48"; + phys = <&usb2_phy>; + phy-names = "usb"; + resets = <&powerdown STIH416_USB3_POWERDOWN>, + <&softreset STIH416_USB3_SOFTRESET>; + reset-names = "power", "softreset"; + }; }; }; -- 2.34.1