From 26bbf0b57a0848932f725076bcb1245ca696e8d3 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 21 Nov 2010 11:30:36 +0000 Subject: [PATCH] ARM: pgtable: remove L2 cache flushes for SMP page table bring-up The MMU is always configured to read page tables from the L2 cache so there's little point flushing them out of the L2 cache back to RAM. Remove these flushes. Signed-off-by: Russell King --- arch/arm/kernel/smp.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 8c1959590252..46313805f430 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -85,7 +85,6 @@ static inline void identity_mapping_add(pgd_t *pgd, unsigned long start, pmd[1] = __pmd(addr | prot); addr += SECTION_SIZE; flush_pmd_entry(pmd); - outer_clean_range(__pa(pmd), __pa(pmd + 1)); } } @@ -100,7 +99,6 @@ static inline void identity_mapping_del(pgd_t *pgd, unsigned long start, pmd[0] = __pmd(0); pmd[1] = __pmd(0); clean_pmd_entry(pmd); - outer_clean_range(__pa(pmd), __pa(pmd + 1)); } } -- 2.34.1