From 52aa53362eb354df48dbeed236ef7576e13bffac Mon Sep 17 00:00:00 2001 From: Jeff Law Date: Thu, 11 Jul 1996 18:46:41 +0000 Subject: [PATCH] * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two if the next arg is marked with SRC_IN_DST. Gross. Gross hack so that shift-by-two insns are disassembled correctly. --- opcodes/ChangeLog | 5 ++++- opcodes/h8300-dis.c | 4 ++++ 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a6af4aca07..7c913cde09 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,8 @@ Thu Jul 11 11:58:44 1996 Jeffrey A Law (law@cygnus.com) - + + * h8300-dis.c (bfd_h8_disassemble): "abs" is implicitly two + if the next arg is marked with SRC_IN_DST. Gross. + * h8300-dis.c (bfd_h8_disassemble): Print "exr" when we're looking for and find EXR. diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c index 7481019252..659ead8367 100644 --- a/opcodes/h8300-dis.c +++ b/opcodes/h8300-dis.c @@ -287,6 +287,10 @@ bfd_h8_disassemble (addr, info, mode) } else if (x & (IMM|KBIT|DBIT)) { + /* Bletch. For shal #2,er0 and friends. */ + if (*(args+1) & SRC_IN_DST) + abs = 2; + fprintf (stream, "#0x%x", (unsigned) abs); } else if (x & REG) -- 2.34.1