From 775f1cf0c29d662e29905b5b06f0dc079ba10e5a Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 22 Sep 2010 21:53:14 +0000 Subject: [PATCH] opcodes: blackfin: mark push/pop insns with a P6/P7 range as illegal The push/pop multiple insn has a 3 bit field for the P register range, but only values of 0...5 are valid (P0 - P5). There is no such P6 or P7 register, so mark these insns as illegal. Signed-off-by: Mike Frysinger --- opcodes/ChangeLog | 4 ++++ opcodes/bfin-dis.c | 3 +++ 2 files changed, 7 insertions(+) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3067e3cce7..f11938c340 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2010-09-22 Mike Frysinger + + * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5. + 2010-09-22 Robin Getz * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag. diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index a510db1e76..0ce0ecf46f 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -936,6 +936,9 @@ decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf) int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask); int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask); + if (pr > 5) + return 0; + if (W == 1 && d == 1 && p == 1) { OUTS (outf, "[--SP] = (R7:"); -- 2.34.1