From 80ca378b7675c04038afae02b33b4b7d48811d2d Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Fri, 22 Mar 2013 14:20:57 -0300 Subject: [PATCH] drm/i915: there's no DSPPOS register on gen4+ So don't read it when capturing the error state. This solves some "unclaimed register" messages on Haswell when we hang the GPU. Signed-off-by: Paulo Zanoni Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f1dbdd4cb09f..7307974d29eb 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9372,9 +9372,10 @@ intel_display_capture_error_state(struct drm_device *dev) error->plane[i].control = I915_READ(DSPCNTR(i)); error->plane[i].stride = I915_READ(DSPSTRIDE(i)); - if (INTEL_INFO(dev)->gen <= 3) + if (INTEL_INFO(dev)->gen <= 3) { error->plane[i].size = I915_READ(DSPSIZE(i)); - error->plane[i].pos = I915_READ(DSPPOS(i)); + error->plane[i].pos = I915_READ(DSPPOS(i)); + } if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) error->plane[i].addr = I915_READ(DSPADDR(i)); if (INTEL_INFO(dev)->gen >= 4) { @@ -9417,9 +9418,10 @@ intel_display_print_error_state(struct seq_file *m, seq_printf(m, "Plane [%d]:\n", i); seq_printf(m, " CNTR: %08x\n", error->plane[i].control); seq_printf(m, " STRIDE: %08x\n", error->plane[i].stride); - if (INTEL_INFO(dev)->gen <= 3) + if (INTEL_INFO(dev)->gen <= 3) { seq_printf(m, " SIZE: %08x\n", error->plane[i].size); - seq_printf(m, " POS: %08x\n", error->plane[i].pos); + seq_printf(m, " POS: %08x\n", error->plane[i].pos); + } if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev)) seq_printf(m, " ADDR: %08x\n", error->plane[i].addr); if (INTEL_INFO(dev)->gen >= 4) { -- 2.34.1