From 84e052e626d88c04c03f79dd95708e556d018d97 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 13 Nov 2011 03:43:30 +1000 Subject: [PATCH] drm/nvd0/disp: handle yet another interrupt Spotted while messing with overlay channels (probably as a result of sending a similar "disable" sequence as we do for the flip channels). The value in 0x61008c was 0x20, which one would reasonably guess is "bit 5 == something to report about evo channel 5" - but who knows. Spotted the binary driver getting this too, and it appears to not do anything exciting as a result. So, handle it the same way and avoid an IRQ storm. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvd0_display.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c index 8fceebd110e6..51e073828471 100644 --- a/drivers/gpu/drm/nouveau/nvd0_display.c +++ b/drivers/gpu/drm/nouveau/nvd0_display.c @@ -1585,6 +1585,12 @@ nvd0_display_intr(struct drm_device *dev) struct nvd0_display *disp = nvd0_display(dev); u32 intr = nv_rd32(dev, 0x610088); + if (intr & 0x00000001) { + u32 stat = nv_rd32(dev, 0x61008c); + nv_wr32(dev, 0x61008c, stat); + intr &= ~0x00000001; + } + if (intr & 0x00000002) { u32 stat = nv_rd32(dev, 0x61009c); int chid = ffs(stat) - 1; -- 2.34.1