From 912a29c3f18286dcf0386631e529f1f261bac6d7 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Wed, 14 Jan 2015 15:22:20 +1000 Subject: [PATCH] drm/nouveau/bsp: namespace + nvidia gpu names (no binary change) The namespace of NVKM is being changed to nvkm_ instead of nouveau_, which will be used for the DRM part of the driver. This is being done in order to make it very clear as to what part of the driver a given symbol belongs to, and as a minor step towards splitting the DRM driver out to be able to stand on its own (for virt). Because there's already a large amount of churn here anyway, this is as good a time as any to also switch to NVIDIA's device and chipset naming to ease collaboration with them. A comparison of objdump disassemblies proves no code changes. Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/include/nvkm/engine/bsp.h | 7 ++- .../gpu/drm/nouveau/nvkm/engine/bsp/Kbuild | 2 +- .../nouveau/nvkm/engine/bsp/{nv84.c => g84.c} | 61 +++++++++---------- .../gpu/drm/nouveau/nvkm/engine/device/nv50.c | 12 ++-- 4 files changed, 41 insertions(+), 41 deletions(-) rename drivers/gpu/drm/nouveau/nvkm/engine/bsp/{nv84.c => g84.c} (66%) diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/bsp.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/bsp.h index 5ce3b620e6a9..e489beef2b92 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/bsp.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/bsp.h @@ -1,4 +1,5 @@ -#ifndef __NOUVEAU_BSP_H__ -#define __NOUVEAU_BSP_H__ -extern struct nouveau_oclass nv84_bsp_oclass; +#ifndef __NVKM_BSP_H__ +#define __NVKM_BSP_H__ +#include +extern struct nvkm_oclass g84_bsp_oclass; #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/bsp/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/bsp/Kbuild index 3c8757202931..5ac9f9e1a283 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/bsp/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/bsp/Kbuild @@ -1 +1 @@ -nvkm-y += nvkm/engine/bsp/nv84.o +nvkm-y += nvkm/engine/bsp/g84.o diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/bsp/nv84.c b/drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c similarity index 66% rename from drivers/gpu/drm/nouveau/nvkm/engine/bsp/nv84.c rename to drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c index 649922d983ac..a0b1fd80fa93 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/bsp/nv84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/bsp/g84.c @@ -21,9 +21,8 @@ * * Authors: Ben Skeggs, Ilia Mirkin */ - -#include #include +#include #include @@ -31,9 +30,9 @@ * BSP object classes ******************************************************************************/ -static struct nouveau_oclass -nv84_bsp_sclass[] = { - { 0x74b0, &nouveau_object_ofuncs }, +static struct nvkm_oclass +g84_bsp_sclass[] = { + { 0x74b0, &nvkm_object_ofuncs }, {}, }; @@ -41,16 +40,16 @@ nv84_bsp_sclass[] = { * BSP context ******************************************************************************/ -static struct nouveau_oclass -nv84_bsp_cclass = { +static struct nvkm_oclass +g84_bsp_cclass = { .handle = NV_ENGCTX(BSP, 0x84), - .ofuncs = &(struct nouveau_ofuncs) { - .ctor = _nouveau_xtensa_engctx_ctor, - .dtor = _nouveau_engctx_dtor, - .init = _nouveau_engctx_init, - .fini = _nouveau_engctx_fini, - .rd32 = _nouveau_engctx_rd32, - .wr32 = _nouveau_engctx_wr32, + .ofuncs = &(struct nvkm_ofuncs) { + .ctor = _nvkm_xtensa_engctx_ctor, + .dtor = _nvkm_engctx_dtor, + .init = _nvkm_engctx_init, + .fini = _nvkm_engctx_fini, + .rd32 = _nvkm_engctx_rd32, + .wr32 = _nvkm_engctx_wr32, }, }; @@ -59,36 +58,36 @@ nv84_bsp_cclass = { ******************************************************************************/ static int -nv84_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, - struct nouveau_oclass *oclass, void *data, u32 size, - struct nouveau_object **pobject) +g84_bsp_ctor(struct nvkm_object *parent, struct nvkm_object *engine, + struct nvkm_oclass *oclass, void *data, u32 size, + struct nvkm_object **pobject) { - struct nouveau_xtensa *priv; + struct nvkm_xtensa *priv; int ret; - ret = nouveau_xtensa_create(parent, engine, oclass, 0x103000, true, - "PBSP", "bsp", &priv); + ret = nvkm_xtensa_create(parent, engine, oclass, 0x103000, true, + "PBSP", "bsp", &priv); *pobject = nv_object(priv); if (ret) return ret; nv_subdev(priv)->unit = 0x04008000; - nv_engine(priv)->cclass = &nv84_bsp_cclass; - nv_engine(priv)->sclass = nv84_bsp_sclass; + nv_engine(priv)->cclass = &g84_bsp_cclass; + nv_engine(priv)->sclass = g84_bsp_sclass; priv->fifo_val = 0x1111; priv->unkd28 = 0x90044; return 0; } -struct nouveau_oclass -nv84_bsp_oclass = { +struct nvkm_oclass +g84_bsp_oclass = { .handle = NV_ENGINE(BSP, 0x84), - .ofuncs = &(struct nouveau_ofuncs) { - .ctor = nv84_bsp_ctor, - .dtor = _nouveau_xtensa_dtor, - .init = _nouveau_xtensa_init, - .fini = _nouveau_xtensa_fini, - .rd32 = _nouveau_xtensa_rd32, - .wr32 = _nouveau_xtensa_wr32, + .ofuncs = &(struct nvkm_ofuncs) { + .ctor = g84_bsp_ctor, + .dtor = _nvkm_xtensa_dtor, + .init = _nvkm_xtensa_init, + .fini = _nvkm_xtensa_fini, + .rd32 = _nvkm_xtensa_rd32, + .wr32 = _nvkm_xtensa_wr32, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c index f1f041fdb080..b74e27bb81f8 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c @@ -112,7 +112,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; - device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; + device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; @@ -141,7 +141,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; - device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; + device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; @@ -170,7 +170,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; - device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; + device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv84_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; @@ -199,7 +199,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; - device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; + device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; @@ -228,7 +228,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; - device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; + device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nv94_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; @@ -286,7 +286,7 @@ nv50_identify(struct nouveau_device *device) device->oclass[NVDEV_ENGINE_MPEG ] = &nv84_mpeg_oclass; device->oclass[NVDEV_ENGINE_VP ] = &nv84_vp_oclass; device->oclass[NVDEV_ENGINE_CIPHER ] = &nv84_cipher_oclass; - device->oclass[NVDEV_ENGINE_BSP ] = &nv84_bsp_oclass; + device->oclass[NVDEV_ENGINE_BSP ] = &g84_bsp_oclass; device->oclass[NVDEV_ENGINE_DISP ] = nva0_disp_oclass; device->oclass[NVDEV_ENGINE_PM ] = nv84_pm_oclass; break; -- 2.34.1