From 9787c56ee376bfc3ed110c2723462361b700d7d2 Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 3 Apr 2012 15:22:05 -0700 Subject: [PATCH] MIPS: OCTEON: Add OCTEON_IRQ_* definitions for cn68XX chips. There are 64 workqueue, 32 watchdog, and 4 mbox. Signed-off-by: David Daney --- arch/mips/include/asm/mach-cavium-octeon/irq.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h index c22a3078bf11..ff0d4909d848 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/irq.h +++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h @@ -21,10 +21,11 @@ enum octeon_irq { OCTEON_IRQ_TIMER, /* sources in CIU_INTX_EN0 */ OCTEON_IRQ_WORKQ0, - OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 16, - OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15, - OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16, + OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 64, + OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 32, OCTEON_IRQ_MBOX1, + OCTEON_IRQ_MBOX2, + OCTEON_IRQ_MBOX3, OCTEON_IRQ_PCI_INT0, OCTEON_IRQ_PCI_INT1, OCTEON_IRQ_PCI_INT2, -- 2.34.1