From ae3e98b418c6f31cc1999d67fc2422429d88de6f Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Wed, 2 Sep 2020 10:35:10 +0930 Subject: [PATCH] ubsan: *-ibld.c bfin-dis.c:160 shift exponent 32 is too large for 32-bit type 'long unsigned int' bpf-ibld.c:196 left shift of 1 by 31 places cannot be represented in type 'long int' bpf-ibld.c:196 negation of -2147483648 cannot be represented in type 'long int'; cast to an unsigned type to negate this itself bpf-ibld.c:197 left shift of 1 by 31 places cannot be represented in type 'long int' bpf-ibld.c:197 signed integer overflow: -2147483648 - 1 cannot be represented in type 'long int' bpf-ibld.c:501 left shift of 1 by 31 places cannot be represented in type 'long int' * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift. * bpf-ibld.c: Regenerate. * epiphany-ibld.c: Regenerate. * fr30-ibld.c: Regenerate. * frv-ibld.c: Regenerate. * ip2k-ibld.c: Regenerate. * iq2000-ibld.c: Regenerate. * lm32-ibld.c: Regenerate. * m32c-ibld.c: Regenerate. * m32r-ibld.c: Regenerate. * mep-ibld.c: Regenerate. * mt-ibld.c: Regenerate. * or1k-ibld.c: Regenerate. * xc16x-ibld.c: Regenerate. * xstormy16-ibld.c: Regenerate. --- opcodes/ChangeLog | 18 ++++++++++++++++++ opcodes/bpf-ibld.c | 8 ++++---- opcodes/cgen-ibld.in | 8 ++++---- opcodes/epiphany-ibld.c | 8 ++++---- opcodes/fr30-ibld.c | 8 ++++---- opcodes/frv-ibld.c | 8 ++++---- opcodes/ip2k-ibld.c | 8 ++++---- opcodes/iq2000-ibld.c | 8 ++++---- opcodes/lm32-ibld.c | 8 ++++---- opcodes/m32c-ibld.c | 8 ++++---- opcodes/m32r-ibld.c | 8 ++++---- opcodes/mep-ibld.c | 8 ++++---- opcodes/mt-ibld.c | 8 ++++---- opcodes/or1k-ibld.c | 8 ++++---- opcodes/xc16x-ibld.c | 8 ++++---- opcodes/xstormy16-ibld.c | 8 ++++---- 16 files changed, 78 insertions(+), 60 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 1c7e4cb12d..0cb04913b0 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,21 @@ +2020-09-02 Alan Modra + + * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift. + * bpf-ibld.c: Regenerate. + * epiphany-ibld.c: Regenerate. + * fr30-ibld.c: Regenerate. + * frv-ibld.c: Regenerate. + * ip2k-ibld.c: Regenerate. + * iq2000-ibld.c: Regenerate. + * lm32-ibld.c: Regenerate. + * m32c-ibld.c: Regenerate. + * m32r-ibld.c: Regenerate. + * mep-ibld.c: Regenerate. + * mt-ibld.c: Regenerate. + * or1k-ibld.c: Regenerate. + * xc16x-ibld.c: Regenerate. + * xstormy16-ibld.c: Regenerate. + 2020-09-02 Alan Modra * bfin-dis.c (MASKBITS): Use SIGNBIT. diff --git a/opcodes/bpf-ibld.c b/opcodes/bpf-ibld.c index 0070e41086..32260f8a18 100644 --- a/opcodes/bpf-ibld.c +++ b/opcodes/bpf-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/cgen-ibld.in b/opcodes/cgen-ibld.in index 7829822b2c..b06d5c20da 100644 --- a/opcodes/cgen-ibld.in +++ b/opcodes/cgen-ibld.in @@ -154,7 +154,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -192,8 +192,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -497,7 +497,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/epiphany-ibld.c b/opcodes/epiphany-ibld.c index 27f0fabd2a..6e594d3815 100644 --- a/opcodes/epiphany-ibld.c +++ b/opcodes/epiphany-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/fr30-ibld.c b/opcodes/fr30-ibld.c index 8cc70209d4..aa5f846bc4 100644 --- a/opcodes/fr30-ibld.c +++ b/opcodes/fr30-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/frv-ibld.c b/opcodes/frv-ibld.c index 2a7fcb876c..8bc69624dc 100644 --- a/opcodes/frv-ibld.c +++ b/opcodes/frv-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/ip2k-ibld.c b/opcodes/ip2k-ibld.c index 18c2fed67a..0d7b447443 100644 --- a/opcodes/ip2k-ibld.c +++ b/opcodes/ip2k-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/iq2000-ibld.c b/opcodes/iq2000-ibld.c index cad26e226e..ce0b15a57e 100644 --- a/opcodes/iq2000-ibld.c +++ b/opcodes/iq2000-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/lm32-ibld.c b/opcodes/lm32-ibld.c index 48e894a9ee..04d3c9ec0e 100644 --- a/opcodes/lm32-ibld.c +++ b/opcodes/lm32-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c index 67bfb48c0a..228fa0d9c8 100644 --- a/opcodes/m32c-ibld.c +++ b/opcodes/m32c-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c index 8e1a7de814..e4080ef6a5 100644 --- a/opcodes/m32r-ibld.c +++ b/opcodes/m32r-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/mep-ibld.c b/opcodes/mep-ibld.c index 8f03813761..47611dd2ae 100644 --- a/opcodes/mep-ibld.c +++ b/opcodes/mep-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/mt-ibld.c b/opcodes/mt-ibld.c index 924fc90cf7..bd8b545833 100644 --- a/opcodes/mt-ibld.c +++ b/opcodes/mt-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/or1k-ibld.c b/opcodes/or1k-ibld.c index 576a13918b..828aae8637 100644 --- a/opcodes/or1k-ibld.c +++ b/opcodes/or1k-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/xc16x-ibld.c b/opcodes/xc16x-ibld.c index ed51a1b4fe..9b87c3b4a3 100644 --- a/opcodes/xc16x-ibld.c +++ b/opcodes/xc16x-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; diff --git a/opcodes/xstormy16-ibld.c b/opcodes/xstormy16-ibld.c index 06f036fd12..5784b583a6 100644 --- a/opcodes/xstormy16-ibld.c +++ b/opcodes/xstormy16-ibld.c @@ -155,7 +155,7 @@ insert_normal (CGEN_CPU_DESC cd, /* Ensure VALUE will fit. */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) { - long minval = - (1L << (length - 1)); + long minval = - (1UL << (length - 1)); unsigned long maxval = mask; if ((value > 0 && (unsigned long) value > maxval) @@ -193,8 +193,8 @@ insert_normal (CGEN_CPU_DESC cd, { if (! cgen_signed_overflow_ok_p (cd)) { - long minval = - (1L << (length - 1)); - long maxval = (1L << (length - 1)) - 1; + long minval = - (1UL << (length - 1)); + long maxval = (1UL << (length - 1)) - 1; if (value < minval || value > maxval) { @@ -498,7 +498,7 @@ extract_normal (CGEN_CPU_DESC cd, value &= mask; /* sign extend? */ if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) - && (value & (1L << (length - 1)))) + && (value & (1UL << (length - 1)))) value |= ~mask; *valuep = value; -- 2.34.1