From c05d17211ee207282e7a8a397a2ee39d798dc708 Mon Sep 17 00:00:00 2001 From: Ian Lance Taylor Date: Thu, 19 Sep 1996 22:52:26 +0000 Subject: [PATCH] * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC. It's OK to have a mult follow a mult. What's not OK is to have a mult follow an mfhi. --- sim/mips/ChangeLog | 4 ++++ sim/mips/interp.c | 4 ---- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index aed2073b4f..49060fa260 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,5 +1,9 @@ Thu Sep 19 15:34:17 1996 Ian Lance Taylor + * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC. + It's OK to have a mult follow a mult. What's not OK is to have a + mult follow an mfhi. + * gencode.c (process_instructions): Correct handling of nor instruction. Correct shift count for 32 bit shift instructions. Correct sign extension for arithmetic shifts to not shift the diff --git a/sim/mips/interp.c b/sim/mips/interp.c index c5fdaeb670..9c47b4aaa1 100644 --- a/sim/mips/interp.c +++ b/sim/mips/interp.c @@ -361,10 +361,6 @@ static ut_reg HLPC = 0; #define CHECKHILO(s) {\ if ((HIACCESS != 0) || (LOACCESS != 0))\ sim_warning("%s over-writing HI and LO registers values (PC = 0x%08X%08X HLPC = 0x%08X%08X)\n",(s),(unsigned int)(PC>>32),(unsigned int)(PC&0xFFFFFFFF),(unsigned int)(HLPC>>32),(unsigned int)(HLPC&0xFFFFFFFF));\ - /* Set the access counts, since we are about\ - to update the HI and LO registers: */\ - HIACCESS = LOACCESS = 3; /* 3rd instruction will be safe */\ - HLPC = PC;\ } /* NOTE: We keep the following status flags as bit values (1 for true, -- 2.34.1