From c317adcd58cdc05badd73db901c677164050ab6c Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Wed, 3 Sep 2014 14:09:50 +0300 Subject: [PATCH] drm/i915: Don't call gen8_fbc_sw_flush() on chv MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit CHV doesn't have FBC, so don't go calling gen8_fbc_sw_flush() on it. Cc: Rodrigo Vivi Signed-off-by: Ville Syrjälä [danvet: Add a FIXME comment while at it that we should rework this a lot more.] Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d49d639bd383..b8a00ed67e09 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9098,7 +9098,12 @@ void intel_frontbuffer_flush(struct drm_device *dev, intel_edp_psr_flush(dev, frontbuffer_bits); - if (IS_GEN8(dev)) + /* + * FIXME: Unconditional fbc flushing here is a rather gross hack and + * needs to be reworked into a proper frontbuffer tracking scheme like + * psr employs. + */ + if (IS_BROADWELL(dev)) gen8_fbc_sw_flush(dev, FBC_REND_CACHE_CLEAN); } -- 2.34.1