From c40aa4710479b5d9f0e1fdf71b151f4c3708e3eb Mon Sep 17 00:00:00 2001 From: Jeremy Kerr Date: Thu, 20 Dec 2007 16:39:59 +0900 Subject: [PATCH] [POWERPC] spufs: fix incorrect interrupt status clearing in backing mbox stat poll When doing a poll on the mbox stat file of a swapped-out context, we clear the class 0 interrupt status, rather than the class 2 interrupt status. This change corrects the poll operation to clear the correct interrupt. Signed-off-by: Jeremy Kerr Signed-off-by: Paul Mackerras --- arch/powerpc/platforms/cell/spufs/backing_ops.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/platforms/cell/spufs/backing_ops.c b/arch/powerpc/platforms/cell/spufs/backing_ops.c index 15f915813710..97b2d5e587cc 100644 --- a/arch/powerpc/platforms/cell/spufs/backing_ops.c +++ b/arch/powerpc/platforms/cell/spufs/backing_ops.c @@ -106,7 +106,7 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx, if (stat & 0xff0000) ret |= POLLIN | POLLRDNORM; else { - ctx->csa.priv1.int_stat_class0_RW &= ~0x1; + ctx->csa.priv1.int_stat_class2_RW &= ~0x1; ctx->csa.priv1.int_mask_class2_RW |= 0x1; } } @@ -114,7 +114,7 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx, if (stat & 0x00ff00) ret = POLLOUT | POLLWRNORM; else { - ctx->csa.priv1.int_stat_class0_RW &= ~0x10; + ctx->csa.priv1.int_stat_class2_RW &= ~0x10; ctx->csa.priv1.int_mask_class2_RW |= 0x10; } } -- 2.34.1