From c6e5c03a2c0dfa224a71056ede035476e511f5fc Mon Sep 17 00:00:00 2001 From: Robert Suchanek Date: Tue, 28 Jul 2015 11:26:39 +0100 Subject: [PATCH] Add cores for M5100 series gas/ * config/tc-mips.c (mips_cpu_info_table): Add m5100 and m5101 entries. * doc/c-mips.texi: Document m5100 and m5101 for -march=. --- gas/ChangeLog | 5 +++++ gas/config/tc-mips.c | 3 +++ gas/doc/c-mips.texi | 2 ++ 3 files changed, 10 insertions(+) diff --git a/gas/ChangeLog b/gas/ChangeLog index b0eb854ff9..2ac50cb490 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,8 @@ +2015-07-28 Robert Suchanek + + * config/tc-mips.c (mips_cpu_info_table): Add m5100 and m5101 entries. + * doc/c-mips.texi: Document m5100 and m5101 for -march=. + 2015-07-28 Robert Suchanek * config/tc-mips.c (mips_cpu_info_table): Add interaptiv entry. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 907fafdc83..45126fec7c 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -18668,6 +18668,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "1004kf1_1", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, /* interaptiv is the new name for 1004kf */ { "interaptiv", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, + /* M5100 family */ + { "m5100", 0, ASE_MCU, ISA_MIPS32R5, CPU_MIPS32R5 }, + { "m5101", 0, ASE_MCU, ISA_MIPS32R5, CPU_MIPS32R5 }, /* P5600 with EVA and Virtualization ASEs, other ASEs are optional. */ { "p5600", 0, ASE_VIRT | ASE_EVA | ASE_XPA, ISA_MIPS32R5, CPU_MIPS32R5 }, diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index f2f80d5095..8903126965 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -370,6 +370,8 @@ m14kec, 1004kf, 1004kf1_1, interaptiv, +m5100, +m5101, p5600, 5kc, 5kf, -- 2.34.1