From dc958481429708ecf91f9b2c445063d43397f07e Mon Sep 17 00:00:00 2001 From: claziss Date: Wed, 22 Nov 2017 10:46:45 +0100 Subject: [PATCH] [ARC] Fix handling of ARCv2 H-register class. For ARCv2, h-regs are only valid unitl r31. gas/ 2017-11-21 Claudiu Zissulescu * testsuite/gas/arc/hregs-err.s: New test. opcodes/ 2017-11-21 Claudiu Zissulescu * arc-opc.c (insert_rhv2): Check h-regs range. --- gas/ChangeLog | 4 ++++ gas/testsuite/gas/arc/hregs-err.s | 11 +++++++++++ opcodes/ChangeLog | 4 ++++ opcodes/arc-opc.c | 2 ++ 4 files changed, 21 insertions(+) create mode 100644 gas/testsuite/gas/arc/hregs-err.s diff --git a/gas/ChangeLog b/gas/ChangeLog index fd4f3793f2..fa18fb3902 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,7 @@ +2017-11-22 Claudiu Zissulescu + + * testsuite/gas/arc/hregs-err.s: New test. + 2017-11-21 H.J. Lu PR gas/22464 diff --git a/gas/testsuite/gas/arc/hregs-err.s b/gas/testsuite/gas/arc/hregs-err.s new file mode 100644 index 0000000000..f5fa5e884d --- /dev/null +++ b/gas/testsuite/gas/arc/hregs-err.s @@ -0,0 +1,11 @@ +; { dg-do assemble { target arc*-*-* } } + .cpu HS + .text + ld_s r0,[r32,28] ; { dg-error "Error: register must be R1 for instruction 'ld_s'" } + ld_s r0,[r28,28] + ld_s r1,[r32,28] ; { dg-error "Error: register must be GP for instruction 'ld_s'" } + ld_s r2,[r32,28] ; { dg-error "Error: register must be R1 for instruction 'ld_s'" } + ld_s r3,[pcl,0x10] + add_s r0,r0,r32 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" } + add_s r0,r0,r28 + mov_s.ne r0,r32 ; { dg-error "Error: inappropriate arguments for opcode 'mov_s'" } diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 1d835c9c7c..7789b3e5a8 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2017-11-22 Claudiu Zissulescu + + *arc-opc (insert_rhv2): Check h-regs range. + 2017-11-21 Claudiu Zissulescu * arc-dis.c (print_insn_arc): Pretty print pc-relative offsets. diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c index 56c9aaffa8..a17df4b3ce 100644 --- a/opcodes/arc-opc.c +++ b/opcodes/arc-opc.c @@ -171,6 +171,8 @@ insert_rhv2 (unsigned long long insn, { if (value == 0x1E) *errmsg = _("register R30 is a limm indicator"); + else if (value < 0 || value > 31) + *errmsg = _("register out of range"); return insn |= ((value & 0x07) << 5) | ((value >> 3) & 0x03); } -- 2.34.1