From e406f9079b993f4d5d7b5a3452b11df81ff2aef0 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Wed, 9 Jun 2010 15:28:12 +0300 Subject: [PATCH] OMAP: DSS2: DSI: Wait for DSI PLL clocks to be active before selecting them MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The TRM tells us to wait for the DSI PLL derived clocks to become active before selecting them for use. I didn't actually have any issues which this would fix but according to the TRM it seems to be the right thing to do. Signed-off-by: Ville Syrjälä Signed-off-by: Tomi Valkeinen --- drivers/video/omap2/dss/dsi.c | 12 ++++++++++++ drivers/video/omap2/dss/dss.c | 6 ++++++ drivers/video/omap2/dss/dss.h | 8 ++++++++ 3 files changed, 26 insertions(+) diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 04d84d13488b..6035904f1314 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c @@ -3195,6 +3195,18 @@ int dsi_init_display(struct omap_dss_device *dssdev) return 0; } +void dsi_wait_dsi1_pll_active(void) +{ + if (wait_for_bit_change(DSI_PLL_STATUS, 7, 1) != 1) + DSSERR("DSI1 PLL clock not active\n"); +} + +void dsi_wait_dsi2_pll_active(void) +{ + if (wait_for_bit_change(DSI_PLL_STATUS, 8, 1) != 1) + DSSERR("DSI2 PLL clock not active\n"); +} + int dsi_init(struct platform_device *pdev) { u32 rev; diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 24b18258654f..77c3621c9171 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c @@ -265,6 +265,9 @@ void dss_select_dispc_clk_source(enum dss_clk_source clk_src) b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1; + if (clk_src == DSS_SRC_DSI1_PLL_FCLK) + dsi_wait_dsi1_pll_active(); + REG_FLD_MOD(DSS_CONTROL, b, 0, 0); /* DISPC_CLK_SWITCH */ dss.dispc_clk_source = clk_src; @@ -279,6 +282,9 @@ void dss_select_dsi_clk_source(enum dss_clk_source clk_src) b = clk_src == DSS_SRC_DSS1_ALWON_FCLK ? 0 : 1; + if (clk_src == DSS_SRC_DSI2_PLL_FCLK) + dsi_wait_dsi2_pll_active(); + REG_FLD_MOD(DSS_CONTROL, b, 1, 1); /* DSI_CLK_SWITCH */ dss.dsi_clk_source = clk_src; diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h index 786f433fd571..66e8e97d06a7 100644 --- a/drivers/video/omap2/dss/dss.h +++ b/drivers/video/omap2/dss/dss.h @@ -281,6 +281,8 @@ void dsi_pll_uninit(void); void dsi_get_overlay_fifo_thresholds(enum omap_plane plane, u32 fifo_size, enum omap_burst_size *burst_size, u32 *fifo_low, u32 *fifo_high); +void dsi_wait_dsi1_pll_active(void); +void dsi_wait_dsi2_pll_active(void); #else static inline int dsi_init(struct platform_device *pdev) { @@ -289,6 +291,12 @@ static inline int dsi_init(struct platform_device *pdev) static inline void dsi_exit(void) { } +static inline void dsi_wait_dsi1_pll_active(void) +{ +} +static inline void dsi_wait_dsi2_pll_active(void) +{ +} #endif /* DPI */ -- 2.34.1