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ARM: keystone: dts: add paclk divider clock node
2013-12-13  Murali KaricheriARM: keystone: dts: add paclk divider clock node
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-12-13  Murali KaricheriARM: keystone: dts: fix typo in the ddr3 pllclk node...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-12-13  Murali KaricheriARM: keystone: dts: add a k2hk-evm specific dts file
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-11  Santosh ShilimkarARM: mm: Recreate kernel mappings in early_paging_init()
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-11  Sricharan RARM: mm: Correct virt_to_phys patching for 64 bit physical...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-11  Santosh ShilimkarARM: mm: Move the idmap print to appropriate place...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-11  Santosh ShilimkarARM: mm: Introduce virt_to_idmap() with an arch hook
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-11  Santosh ShilimkarARM: mm: use phys_addr_t appropriately in p2v and v2p...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-10  Santosh ShilimkarARM: keystone: Enable I2C and SPI bus support
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-10  Santosh ShilimkarARM: keystone: Select TI_EDMA to be able to enable...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-10  Santosh Shilimkardma: Allow TI_EDMA selectable for ARCH_KEYSTONE
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-10  Santosh ShilimkarARM: dts: keystone: Add the SPI nodes
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-10  Santosh ShilimkarARM: dts: keystone: Add i2c device nodes
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-10  Santosh ShilimkarARM: keystone: add PM domain support for clock management
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-08  Santosh ShilimkarARM: keystone: Enable clock drivers
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-08  Santosh ShilimkarARM: dts: keystone: Add clock phandle to UART nodes
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-10-08  Santosh ShilimkarARM: dts: keystone: Add clock tree data to devicetree
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-08-05  Santosh ShilimkarARM: Keystone: Convert device tree file to use IRQ...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-08-05  Santosh ShilimkarARM: keystone: use #include to include skeleton.dtsi
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-08-05  Santosh ShilimkarARM: keystone: Drop the un-necessary dsb from keystone_cpu_smc()
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-08-05  Santosh ShilimkarARM: Keystone: No need to preserve r12 across smc call
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-08-05  Sudeep KarkadaNageshaARM: keystone: remove redundant smp_init_cpus definition
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-08-05  Paul BolleARM: keystone: drop useless HAVE_SCHED_CLOCK
[santosh.shilimkar@ti.com: Minor edit in the subject]
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-06-17  Santosh ShilimkarARM: keystone: Enable SMP support on Keystone machines
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-06-17  Santosh ShilimkarARM: keystone: Add minimal TI Keystone platform support
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-06-17  Santosh ShilimkarARM: dts: keystone: Add minimal Keystone SOC device...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Santosh ShilimkarARM: OMAP4: Fix the init code to have OMAP4460 errata...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Santosh ShilimkarARM: OMAP4: PM: Now remove L4 per clockdomain static...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Santosh ShilimkarARM: OMAP4: PM: Remove L4 wakeup depedency with MPU...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Santosh ShilimkarARM: OMAP4+: Move the CPU wakeup prepare code under...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Santosh ShilimkarARM: OMAP4+: Remove out of placed smp_wmb() in secondary...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Santosh ShilimkarARM: OMAP4+: Remove un-necessary cacheflush in secondary...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Santosh ShilimkarARM: OMAP4+: Remove the un-necessary cache flush from...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Santosh ShilimkarARM: OMAP2+: PM: Remove bogus fiq_[enable/disable]...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-28  Tero KristoARM: OMAP4+: Use common scratchpad SAR RAM offsets...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-19  Rajendra NayakARM: OMAP5: clock: No Freqsel on OMAP5 devices too
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-19  Santosh ShilimkarARM: OMAP5: Make errata i688 workaround available
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-19  Santosh ShilimkarARM: OMAP5: Update SAR memory layout for WakeupGen
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-19  Santosh ShilimkarARM: OMAP5: Update SAR RAM base address
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-19  Tero KristoARM: OMAP5: Reuse prm read_inst/write_inst
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-19  Santosh ShilimkarARM: OMAP5: prm: Allow prm init to succeed
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-19  Santosh ShilimkarARM: OMAP5: timer: Update the clocksource name as per...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2013-03-19  Santosh ShilimkarARM: OMAP5: Update SOC id detection code for ES2
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-09-19  Santosh ShilimkarARM: OMAP5: Enable arch timer support
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-09-19  Santosh ShilimkarARM: OMAP: Add initialisation for the real-time counter.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  Tarun Kanti DebBarmaARM: Kconfig update to support additional GPIOs in...
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP5: Add the build support
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R Sricharanarm/dts: OMAP5: Add omap5 dts files
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP5: board-generic: Add device tree support
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: omap2+: board-generic: clean up the irq data from...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  Santosh ShilimkarARM: OMAP5: Add SMP support
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  Santosh ShilimkarARM: OMAP5: Add the WakeupGen IP updates
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP5: l3: Add l3 error handler support for omap5
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP5: gpmc: Update gpmc_init()
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP5: timer: Add clocksource, clockevent support
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP5: Add minimal support for OMAP5430 SOC
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP5: id: Add cpu id for ES versions
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP: counter-32k: Select the CR register offset...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-07-09  R SricharanARM: OMAP2+: Move stubbed secure_sram_reserve function...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-05-08  R SricharanARM: OMAP2+: dma: Define dma capabilities register...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-05-08  Santosh ShilimkarARM: OMAP4: Reduce the static IO mapping
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-05-08  Santosh ShilimkarARM: All OMAP2PLUS machines use omap2 directory so...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-05-08  Santosh ShilimkarARM: OMAP: dma: Make use of cpu_class_is_omap2() to...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-05-08  Santosh ShilimkarARM: OMAP4: Remove un-used WakeupGen register defines.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-05-08  Santosh ShilimkarARM: OMAP2+: Clean up wrapping multiple objects in...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2012-05-08  Santosh ShilimkarARM: OMAP4: Don't compile cm2xxx_3xxx.c for OMAP4 only...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-24  Santosh ShilimkarOMAP4: Fix the emif and dmm virtual mapping
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-24  sricharanOMAP: Print Initiator name for l3 custom error.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-24  sricharanOMAP: Fix sparse warnings in l3 error handler.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-24  sricharanOMAP: Fix indentation issues in l3 error handler.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-24  Todd PoynorOMAP: Fix a BUG in l3 error handler.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-24  Todd PoynorOMAP: Improve register access in L3 Error handler.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-23  Santosh ShilimkarARM: mm: Add strongly ordered descriptor support.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-23  Santosh ShilimkarARM: vfp: Fix the comment to make it consistent with...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-23  Colin CrossARM: gic: Allow gic arch extensions to provide irqchip...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-23  Colin CrossARM: vfp: Use cpu pm notifiers to save vfp state
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-23  Colin CrossARM: gic: Use cpu pm notifiers to save gic state
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-23  Santosh ShilimkarARM: Enable CPU_PM notifiers on ARM machines.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-23  Colin Crosscpu_pm: call notifiers during suspend
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-09-23  Colin Crosscpu_pm: Add cpu power management notifiers
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-03-09  Santosh ShilimkarOMAP4: l3: Introduce l3-interconnect error handling...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-03-09  sricharanOMAP4: Initialise the l3 device with the hwmod data.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-03-09  sricharanOMAP4: hwmod_data: Add address space and irq in L3...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-03-09  Felipe BalbiOMAP3: l3: Introduce l3-interconnect error handling...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
[santosh.shilimkar@ti.com: Driver design changes as per...
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2011-03-09  sricharanOMAP3: devices: Initialise the l3 device with the hwmod...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2011-03-09  sricharanOMAP3: hwmod_data: Add address space and irq in L3...
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-10-26  Per FranssonARM: ux500 specific L2 cache code
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-10-26  Santosh ShilimkarARM: l2x0: Optimise the range based operations
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-10-26  Santosh ShilimkarARM: l2x0: Determine the cache size
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-10-26  Santosh ShilimkarARM: l2x0: Fix coding-style in the cache-l2x0.h
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-10-26  Santosh Shilimkaromap4: l2x0: Override the default l2x0_disable
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-10-26  Thomas Gleixnerarm: Implement l2x0 cache disable functions
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2010-10-26  Thomas Gleixnerarm: Disable outer (L2) cache in kexec
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2010-10-26  Catalin MarinasARM: Improve the L2 cache performance when PL310 is...
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2010-09-24  Santosh Shilimkaromap4: Fix bootup crash observed with higher CPU clocks
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-09-24  David Andersomap4: Panda: Add DEBUG_LL support
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2010-09-24  Santosh Shilimkaromap4: l2x0: Fix init parameter for es2.0
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-09-24  Santosh Shilimkaromap4: Update id.c and cpu.h for es2.0
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-09-24  Vikram Panditaomap4: sram: Fix start address
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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2010-09-24  Vikram Panditaomap: sram: fix is_sram_locked check
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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