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drm/i915: Check VBT for port presence in addition to the strap on VLV/CHV
2016-06-07  Ville Syrjälädrm/i915: Check VBT for port presence in addition to...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464945463-14364-1-git-send-email-ville.syrjala@linux.intel.com
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2016-06-02  Ville Syrjälädrm/i915: Extract physical display dimensions from VBT
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464685714-30507-1-git-send-email-ville.syrjala@linux.intel.com
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2016-05-30  Ville Syrjälädrm/i915: kill STANDARD/CURSOR plane screams
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464371966-15190-8-git-send-email-ville.syrjala@linux.intel.com
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2016-05-30  Ville Syrjälädrm/i915: Give encoders useful names
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464371966-15190-7-git-send-email-ville.syrjala@linux.intel.com
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2016-05-30  Ville Syrjälädrm/i915: Give meaningful names to all the planes
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464371966-15190-6-git-send-email-ville.syrjala@linux.intel.com
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2016-05-30  Ville Syrjälädrm/i915: Don't leak primary/cursor planes on crtc...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464371966-15190-5-git-send-email-ville.syrjala@linux.intel.com
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2016-05-30  Ville Syrjälädrm/i915: Set crtc->name to "pipe A", "pipe B", etc.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464371966-15190-4-git-send-email-ville.syrjala@linux.intel.com
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2016-05-30  Ville Syrjälädrm/i915: Use plane->name in debug prints
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464371966-15190-3-git-send-email-ville.syrjala@linux.intel.com
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2016-05-30  Ville Syrjälädrm/i915: Use crtc->name in debug messages
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464371966-15190-2-git-send-email-ville.syrjala@linux.intel.com
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2016-05-27  Ville Syrjälädrm/i915: Reject modeset if the dotclock is too high
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1464114859-15610-1-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Assert the dbuf is enabled when disabling...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463407180-28993-1-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Set BXT cdclk to minimum initially
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-22-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Replace bxt_verify_cdclk_state() with a more...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-21-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Make bxt_set_cdclk() operate in terms of...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-20-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Rewrite broxton_get_display_clock_speed(...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-19-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Update cached cdclk state from broxton_init_cdclk()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-18-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Store BXT DE PLL vco and ref clocks in dev_priv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-17-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Extract bxt DE PLL enable/disable from broxton_set...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-16-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Store cdclk PLL reference clock under dev_priv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-15-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Rename skl_vco_freq to cdclk_pll.vco
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-14-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Make 308 and 671 MHz cdclks more accurate...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-13-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Move SKL+ DBUF enable/disable to display...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-12-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Unify SKL cdclk init paths
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-11-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Beef up skl_sanitize_cdclk() a bit
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-10-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Keep track of preferred cdclk vco frequency...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-9-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Allow enable/disable of DPLL0 around cdclk...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-8-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Report the current DPLL0 vco on SKL/KBL
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-7-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Actually read out DPLL0 vco on skl from hardware
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-6-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Extract skl_calc_cdclk()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-5-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Move the SKL DPLL0 VCO computation into intel_dp_c...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-4-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Clint Taylordrm/i915/skl: SKL CDCLK change on modeset tracking VCO
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-3-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Fix BXT min_pixclk after state readout
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463172100-24715-2-git-send-email-ville.syrjala@linux.intel.com
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2016-05-23  Ville Syrjälädrm/i915: Enable GSE interrupt on BDW+
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1463649283-28698-1-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Eliminate the CDCLK_CTL RMW on BXT
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-14-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Program BXT_CDCLK_CD2X_PIPE
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-13-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: s/required_vco/vco/ in skl cdclk code
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-12-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: s/freq/cdclk/
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-11-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Kill off dead code from skl_dpll0_enable()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-10-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Extract skl_dpll0_disable()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-9-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Remove 10% cdclk guardband on BXT
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-8-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Use skl_cdclk_decimal() on bxt
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-7-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Use ilk_max_pixel_rate() for BXT cdclk calculation
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-6-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Don't pass dev_priv to broxton_calc_cdclk()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-5-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Untangle .fdi_link_train and cdclk vfunc...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-4-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Extract broadwell_calc_cdclk()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-3-git-send-email-ville.syrjala@linux.intel.com
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2016-05-13  Ville Syrjälädrm/i915: Drop checks for max_pixclk failures in cdclk...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462995892-32416-2-git-send-email-ville.syrjala@linux.intel.com
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2016-05-12  Ville Syrjälädrm/i915: s/DPPL/DPLL/ for SKL DPLLs
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462993473-8254-1-git-send-email-ville.syrjala@linux.intel.com
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2016-05-10  Ville Syrjälädrm/i915: Re-enable GGTT earlier during resume on pre...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462559755-353-1-git-send-email-ville.syrjala@linux.intel.com
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2016-05-09  Ville Syrjälädrm/i915: Add a FIXME about crtc !active vs. watermarks
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1461940278-17122-2-git-send-email-ville.syrjala@linux.intel.com
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2016-05-09  Ville Syrjälädrm/i915: Calculate IPS linetime watermark based on...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1461940278-17122-1-git-send-email-ville.syrjala@linux.intel.com
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2016-05-09  Ville Syrjälädrm/i915: Determine DP++ type 1 DVI adaptor presence...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462362322-31278-1-git-send-email-ville.syrjala@linux.intel.com
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2016-05-09  Ville Syrjälädrm/i915: Enable/disable TMDS output buffers in DP...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462216105-20881-4-git-send-email-ville.syrjala@linux.intel.com
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2016-05-09  Ville Syrjälädrm/i915: Respect DP++ adaptor TMDS clock limit
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462216105-20881-3-git-send-email-ville.syrjala@linux.intel.com
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2016-05-09  Ville Syrjälädrm: Add helper for DP++ adaptors
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1462542412-25533-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-28  Ville Syrjälädrm/i915: Fix comments about GMBUSFREQ register
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1461689194-6079-4-git-send-email-ville.syrjala@linux.intel.com
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2016-04-28  Ville Syrjälädrm/i915: Use cached cdclk value in i915_audio_component_get...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1461689194-6079-3-git-send-email-ville.syrjala@linux.intel.com
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2016-04-28  Ville Syrjälädrm/i915: Update CDCLK_FREQ register on BDW after changing...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1461689194-6079-2-git-send-email-ville.syrjala@linux.intel.com
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2016-04-27  Ville Syrjälädrm/i915: Update RAWCLK_FREQ register on VLV/CHV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1461768202-17544-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-27  Ville Syrjälädrm/i915: Unify VLV/CHV DPOunit clock gating disable...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460996305-30453-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-22  Ville Syrjälädrm/i915: Make RPS EI/thresholds multiple of 25 on...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1461159836-9108-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-22  Shashank Sharmadrm/i915: Fake HDMI live status
Suggested-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2016-04-20  Mika Kaholadrm/i915: Fix eDP low vswing for Broadwell
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2016-04-19  Ville Syrjälädrm/i915: Wait for power cycle delay after turning...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460996271-29795-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-19  Ville Syrjälädrm/i915: Define HSW/BDW display power domains the...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460977348-32260-4-git-send-email-ville.syrjala@linux.intel.com
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2016-04-19  Ville Syrjälädrm/i915: Define VLV/CHV display power well domains...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460977348-32260-3-git-send-email-ville.syrjala@linux.intel.com
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2016-04-19  Ville Syrjälädrm/i915: Set .domains=POWER_DOMAIN_MASK for the always...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460977348-32260-2-git-send-email-ville.syrjala@linux.intel.com
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2016-04-19  Ville Syrjälädrm/i915: Fix oops in vlv_force_pll_on()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1461000844-20543-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-18  Ville Syrjälädrm/i915: Replace nondescript 'WARN_ON(!lret)' with...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460978973-24945-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-15  Ville Syrjälädrm/i915: Reject 'Center' scaling mode for eDP/DSI...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460488478-18311-6-git-send-email-ville.syrjala@linux.intel.com
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2016-04-15  Ville Syrjälädrm/i915: Hook up pfit for DSI
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460488478-18311-5-git-send-email-ville.syrjala@linux.intel.com
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2016-04-15  Ville Syrjälädrm/i915: Eliminate {vlv,bxt}_configure_dsi_pll()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460488478-18311-4-git-send-email-ville.syrjala@linux.intel.com
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2016-04-15  Ville Syrjälädrm/i915: Compute DSI PLL parameters during .compute_config()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460488478-18311-3-git-send-email-ville.syrjala@linux.intel.com
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2016-04-15  Ville Syrjälädrm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460488478-18311-2-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Use fw_domains_put_with_fifo() on HSW
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460633942-24013-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Split gen8_gt_irq_handler into ack+handle
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-13-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Eliminate passing dev+dev_priv to {snb,ilk...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-12-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Move gt/pm irq handling out from irq disabled...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-11-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Split VLV/CVH PIPESTAT handling into ack...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-10-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Split PORT_HOTPLUG_STAT ack out from i9xx_hpd_irq_...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-9-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Move variables to narrower scope in VLV/CHV...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2016-04-14  Ville Syrjälädrm/i915: Eliminate loop from VLV irq handler
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2016-04-14  Ville Syrjälädrm/i915: Clear VLV_IER around irq processing
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2016-04-14  Ville Syrjälädrm/i915: Clear VLV_MASTER_IER around irq processing
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-5-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Clear VLV_IIR after PIPESTAT
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-4-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Set up VLV_MASTER_IER consistently
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-3-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Use GEN8_MASTER_IRQ_CONTROL consistently
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460571598-24452-2-git-send-email-ville.syrjala@linux.intel.com
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2016-04-14  Ville Syrjälädrm/i915: Ignore GTFIFODBG FIFO free entry fields on CHV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460570970-14073-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Don't read out port_clock on CHV when DPLL...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1458052809-23426-9-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Dump pfit PGM_RATIOS as hex
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1458052809-23426-15-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Fix CHV DSI PLL refclk during state readout
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1458052809-23426-13-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Power down the DSI PLL before reconfiguring it
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1458052809-23426-11-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Change lfsr_converts[] to u16
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1458052809-23426-10-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville SyrjäläRevert "drm/i915: Limit the auto arming of mmio debugs...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460382992-28728-11-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Move DPINVGTT setup to vlv_display_irq_reset()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460382992-28728-10-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Move vlv_init_display_clock_gating() to the...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460382992-28728-9-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Warn if irq_mask isn't ~0 during vlv/cvh...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460382992-28728-8-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460382992-28728-7-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Clear display interrupt before enabling when...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460382992-28728-6-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Move vlv/chv display irq code to a more logical...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460476604-2035-1-git-send-email-ville.syrjala@linux.intel.com
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2016-04-12  Ville Syrjälädrm/i915: Skip display irq setup if display irqs aren...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
...1460382992-28728-4-git-send-email-ville.syrjala@linux.intel.com
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Linux kernel - Deliverables
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