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drm/i915: Handle 320 vs. 333 MHz cdclk on vlv
2014-07-07  Ville Syrjälädrm/i915: Handle 320 vs. 333 MHz cdclk on vlv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-07-07  Ville Syrjälädrm/i915: Move vlv cdclk code to .get_display_clock_speed()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-07-07  Ville Syrjälädrm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-07-07  Ville Syrjälädrm/i915: Change vlv cdclk to use kHz units
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-27  Ville Syrjälädrm/i915: Wait for vblank after enabling the primary...
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-17  Ville Syrjälädrm/i915: Don't prefault the entire obj if the vma...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-13  Ville Syrjälädrm/i915: Fix __user sparse warning
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-13  Ville Syrjälädrm/i915: Print PCI revision in i915_dump_device_info()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-13  Ville Syrjälädrm/i915: Add locking around framebuffer_references--
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-13  Ville Syrjälädrm/i915: Don't get hw state from DVO chip unless DVO...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-13  Ville Syrjälädrm/i915: Use named initializers for gmch wm params
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915/chv: Handle video DIP registers on CHV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915: Don't use pipe_offset stuff for DPLL registers
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915/chv: Force PHY clock buffers off after PLL...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915/chv: Force clock buffer enables
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915/chv: Try to program the PHY used clock channel...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915/chv: CHV doesn't need WaRsForcewakeWaitTC0
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915: Keep vblank interrupts enabled while enabling...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-11  Ville Syrjälädrm/i915: Avoid div-by-zero when pixel_multiplier is...
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-05  Ville Syrjälädrm/i915: Don't WARN about ring idle bit on gen2
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-05  Ville Syrjälädrm/i915: Move the C3 LP write bit setup to gen3_init_clock_...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-05  Ville Syrjälädrm/i915: Enable interrupt-based AGPBUSY# enable on 85x
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-05  Ville Syrjälädrm/i915: Flip the sense of AGPBUSY_DIS bit
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-06-05  Ville Syrjälädrm/i915: Set AGPBUSY# bit in init_clock_gating
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Implement WaVcpClkGateDisableForMediaReset...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Fix gen2 and hsw+ scanline counter
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Draw a picture about video timings
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Improve gen3/4 frame counter
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Add a small adjustment to the pixel counter...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Wait for pending page flips before enabling...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Shuffle fifo underrun disable/enable points...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Simplify the uncleared FIFO underrun detection
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Check for FIFO underruns at the end of modeset...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Check for FIFO underuns when disabling reporting...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Provide DPIO diagrams as docboox tables
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-22  Ville Syrjälädrm/i915: Add a brief description of the VLV display...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-21  Ville Syrjälädrm/i915: Re-enable vblank irqs for already active...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-21  Ville Syrjälädrm/i915: Move buffer pinning and ring selection to...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-21  Ville Syrjälädrm/i915: Drop the excessive vblank waits from modeset...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-21  Ville Syrjälädrm/i915: Wait for vblank in hsw_enable_ips()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-21  Ville Syrjälädrm/i915: Fix mmio vs. CS flip race on ILK+
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm: Add drm_vblank_on()
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm: Make blocking vblank wait return when the vblank...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm: Make the vblank disable timer per-crtc
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915: Clear GDSR after reset on ILK
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915: Kill RMW from ILK reset code
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915: Drop /** */ comments from i915_reg.h
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Add a bunch of pre production workarounds
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Use RMW to toggle swing calc init
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Don't do group access reads from TX lanes...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Don't use PCS group access reads
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Set soft reset override bit for data...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Reset data lanes in encoder .post_disable...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Turn off dclkp after the PLL has been...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Move data lane deassert to encoder pre_enable
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Fix CHV PLL state tracking
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Register port D encoders and connectors
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Fix PORT_TO_PIPE for CHV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Bump num_pipes to 3
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Add cursor pipe offsets
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Fix gmbus for port D
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Configure crtc_mask correctly for CHV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Make CHV irq handler loop until all interrupts...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrrm/i915/chv: Use valleyview_pipestat_irq_handler...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Clarify VLV/CHV PIPESTAT bits a bit more
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Add some workaround notes
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Implement WaDisableSDEUnitClockGating:chv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Implement WaDisableCSUnitClockGating:chv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Implement WaDisableSemaphoreAndSyncFlipWait:chv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Implement WaVSRefCountFullforceMissDisable...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Implement WaDisableThreadStallDopClockGating:chv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915/chv: Implement WaDisablePartialInstShootdown:chv
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915: Fix ILK GPU reset domain bits
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915: Fix ILK reset wait
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-20  Ville Syrjälädrm/i915: Drop bogus comments about display reset
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-16  Ville Syrjälädrm/i915: Convert uncleared FIFO underrun message to...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-15  Ville Syrjälädrm/i915: Increase WM memory latency values on SNB
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-13  Ville Syrjälädrm/i915: Kill vblank waits after pipe enable on gmch...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-13  Ville Syrjälädrm/i915: Disable/enable planes as the first/last thing...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-13  Ville Syrjäläx86/gpu: Sprinkle const, __init and __initconst to...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-13  Ville Syrjälädrm/i915/chv: CHV doesn't have CRT output
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)
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2014-05-13  Ville Syrjälädrm/i915/chv: Add DPLL state readout support
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-12  Ville Syrjälädrm/i915/chv: Add DDL register defines for Cherryview
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-12  Ville Syrjäläsrm/i915/chv: Add Cherryview PCI IDs
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-12  Ville Syrjälädrm/i915/chv: Initial clock gating support for Cherryview
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-12  Ville Syrjälädrm/i915/chv: Add Cherryview interrupt registers into...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-12  Ville Syrjälädrm/i915/chv: Preliminary interrupt support for Cherryview
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v2)
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2014-05-12  Ville Syrjälädrm/i915: Convert gmch platforms over to ilk_crtc_...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915/chv: Add DPINVGTT registers defines for Cherryview
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915/chv: Add display interrupt registers bits...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915/chv: Add DPFLIPSTAT register bits for Cherryview
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915/chv: Add PIPESTAT register bits for Cherryview
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915/chv: Enable aliasing PPGTT for CHV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915/chv: PPAT setup for Cherryview
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)
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2014-05-06  Ville Syrjälädrm/i915: Remove useless checks from primary enable...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915: Merge LP1+ watermarks in safer way
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915: Make sure computed watermarks never overflow...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915: Add pipe update trace points
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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2014-05-06  Ville Syrjälädrm/i915: Perform primary enable/disable atomically...
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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Linux kernel - Deliverables
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