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[ARC] Sync opcode data base.
2017-10-24  Andrew WatermanRISC-V: Fix disassembly of c.addi4spn, c.addi16sp,...
2017-10-24 Andrew Waterman <andrew@sifive.com>
2017-10-24 Andrew Waterman <andrew@sifive.com>
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2017-10-24  Andrew WatermanRISC-V: Only relax to C.LUI when imm != 0 and rd !...
2017-10-24 Andrew Waterman <andrew@sifive.com>
2017-10-24 Andrew Waterman <andrew@sifive.com>
2017-10-24 Andrew Waterman <andrew@sifive.com>
2017-10-24 Andrew Waterman <andrew@sifive.com>
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2017-07-28  Andrew WatermanFix problems parsing RISCV architecture extenstions...
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2017-06-29  Andrew WatermanRISC-V: Fix TLS copy relocs
2017-06-29 Andrew Waterman <andrew@sifive.com>
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2017-06-23  Andrew WatermanRISC-V: Fix SLTI disassembly
2017-06-23 Andrew Waterman <andrew@sifive.com>
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2017-06-23  Andrew WatermanRISC-V: Error, don't warn, for shfit amounts/CSRs
2017-05-11 Andrew Waterman <andrew@sifive.com>
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2017-03-31  Andrew WatermanRISC-V: Add physical memory protection CSRs
2017-03-27 Andrew Waterman <andrew@sifive.com>
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2017-03-14  Andrew WatermanRISC-V: Fix [dis]assembly of srai/srli
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2017-02-24  Andrew Watermanbfd: RISC-V: relax to gp in more cases.
2017-02-24 Andrew Waterman <andrew@sifive.com>
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2017-02-24  Andrew WatermanAdd new counter-enable CSRs
2017-02-22 Andrew Waterman <andrew@sifive.com>
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2017-02-15  Andrew WatermanAdd SFENCE.VMA instruction
2017-02-14 Andrew Waterman <andrew@sifive.com>
2017-02-14 Andrew Waterman <andrew@sifive.com>
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2017-02-08  Andrew WatermanFix segfault when .plt section does not exist
2017-02-07 Andrew Waterman <andrew@sifive.com>
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2017-01-09  Andrew WatermanRISC-V/GAS: Support more relocs against constant addresses
2017-01-09 Andrew Waterman <andrew@sifive.com>
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2017-01-09  Andrew WatermanRISC-V/GAS: Improve handling of invalid relocs
2017-01-09 Andrew Waterman <andrew@sifive.com>
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2017-01-09  Andrew WatermanRISC-V/GAS: Correct branch relaxation for weak symbols.
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2016-12-21  Andrew WatermanSupport aligning text section from odd addresses
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2016-12-21  Andrew WatermanAvoid creating symbol table entries for registers
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2016-12-20  Andrew WatermanCorrect assembler mnemonic for RISC-V aqrl AMOs
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2016-12-20  Andrew WatermanFix disassembly of RISC-V CSR instructions under -Mno...
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2016-12-20  Andrew WatermanAdd canonical JALR for RISC-V
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2016-12-20  Andrew WatermanDon't define RISC-V .p2align
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2016-12-20  Andrew WatermanRe-work RISC-V gas flags: now we just support -mabi...
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2016-12-20  Andrew WatermanFix an integer overflow in RISC-V relocation handling
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2016-12-20  Andrew WatermanRework RISC-V relocations
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2016-12-20  Andrew WatermanFormatting changes for RISC-V
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GDB Binutils - Deliverables
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