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drm/i915: Allocate the pipe_crc->entires with kcalloc()
2014-12-10  Ville Syrjälädrm/i915: Allocate the pipe_crc->entires with kcalloc()
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2014-12-10  Ville Syrjälädrm/i915: Protect pipe_crc->entries update
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2014-12-10  Ville Syrjälädrm/i915: Fix CRC support for DP port D on CHV
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2014-12-10  Ville Syrjälädrm/i915: Engage the DP scramble reset for pipe C on CHV
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2014-12-05  Ville Syrjälädrm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/
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2014-12-03  Ville Syrjälädrm/i915: Deal with video overlay on GPU reset
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2014-12-03  Ville Syrjälädrm/i915: Reject modeset when the same digital port...
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2014-12-03  Ville Syrjälädrm/i915: Disable crtcs gracefully before GPU reset...
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2014-12-03  Ville Syrjälädrm/i915: Grab modeset locks for GPU rest on pre-ctg
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2014-12-03  Ville Syrjälädrm/i915: Implement GPU reset for g33
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2014-12-03  Ville Syrjälädrm/i915: Implement GPU reset for 915/945
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2014-12-03  Ville Syrjälädrm/i915: Restore the display config after a GPU reset...
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2014-12-03  Ville Syrjälädrm/i915: Fix gen4 GPU reset
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2014-12-03  Ville Syrjälädrm/i915: Don't clobber crtc->new_config when nothing...
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2014-11-26  Ville Syrjälädrm/i915: Cancel vdd off work before suspend
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2014-11-24  Ville Syrjälädrm/i915: Ignore SURFLIVE and flip counter when the...
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2014-11-20  Ville Syrjälädrm/i915: Read power well status before other registers...
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2014-11-17  Ville Syrjälädrm/i915: Drop WaRsForcewakeWaitTC0:vlv
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2014-11-17  Ville Syrjälädrm/i915: Drop the HSW special case from __gen6_gt_wait_for_...
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2014-11-17  Ville Syrjälädrm/i915: Change CHV SKU400 GPU freq divider to 10
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2014-11-17  Ville Syrjälädrm/i915: Add missing newline to 'DDR speed' debug...
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2014-11-17  Ville Syrjälädrm/i915: Refactor vlv/chv GPU frequency divider setup
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2014-11-17  Ville Syrjälädrm/i915: Improve PCBR debug information
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2014-11-17  Ville Syrjälädrm/i915: Warn if GPLL isn't used on vlv/chv
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2014-11-17  Ville Syrjälädrm/i915: Add a name for the Punit GPLLENABLE bit
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2014-11-17  Ville Syrjälädrm/i915: Silence valleyview_set_rps()
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2014-11-17  Ville Syrjälädrm/i915: Reinit display irqs and hpd from chv pipe...
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2014-11-14  Ville Syrjälädrm/i915: Fix comments about CHV snoop behaviour
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2014-11-14  Ville Syrjälädrm/i915: Use vlv display irq setup code for chv
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2014-11-14  Ville Syrjälädrm/i915: Refactor vlv_display_irq_uninstall()
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2014-11-14  Ville Syrjälädrm/i915: Read the CCK fuse register from CCK
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2014-11-14  Ville Syrjälädrm/i915: Remove most INVALID_PIPE checks from the...
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2014-11-14  Ville Syrjälädrm/i915: Register the backlight device after the modeset...
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2014-11-14  Ville Syrjälädrm/i915: Pass the current pipe from eDP init to backlight...
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2014-11-14  Ville Syrjälädrm/i915: Don't deref NULL crtc in intel_get_pipe_from_conne...
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2014-11-14  Ville Syrjälädrm/i915: Skip .get_backlight() when backlight isn...
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2014-11-14  Ville Syrjälädrm/i915: Warn if trying to poke a VLV backlight on...
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2014-11-07  Ville Syrjälädrm/i915: Cache HPLL frequency on VLV/CHV
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2014-11-07  Ville Syrjälädrm/i915: Move the .global_resources() hook call into...
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2014-11-07  Ville Syrjälädrm/i915: Kill leftover GTIIR writes from valleyview_irq_pre...
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2014-11-07  Ville Syrjälädrm/i915: Drop useless VLV_IIR writes from vlv_display_irq_p...
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2014-11-07  Ville Syrjälädrm/i914: Refactor vlv_display_irq_postinstall()
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2014-11-07  Ville Syrjälädrm/i915: Refactor vlv_display_irq_reset()
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2014-11-07  Ville Syrjälädrm/i915: Make valleyview_display_irqs_(un)install...
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2014-11-07  Ville Syrjälädrm/i915: Call gen5_gt_irq_reset() from valleyview_irq_unins...
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2014-11-07  Ville Syrjälädrm/i915: Use GEN5_IRQ_RESET() on vlv/chv
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2014-11-07  Ville Syrjälädrm/i915: Use a consistent order between IIR, IER,...
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2014-11-07  Ville Syrjälädrm/i915: Drop the extra GEN8_PCU_IIR posting read...
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2014-11-07  Ville Syrjälädrm/i915: Use gen8_gt_irq_reset() in cherryview_irq_uninstall()
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2014-11-07  Ville Syrjälädrm/i915: Use DPINVGTT_STATUS_MASK
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2014-11-07  Ville Syrjälädrm/i915: Apply some ocd for IMR vs. IER order during...
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2014-11-04  Ville Syrjälädrm/i915: Read out the power sequencer port assignment...
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2014-11-04  Ville Syrjälädrm/i915: Initialize PPS timestamps on vlv/chv
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2014-11-04  Ville Syrjälädrm/i915: Enable pipe-a power well on chv
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2014-11-04  Ville Syrjälädrm/i915: Add support for CHV pipe B sprite CSC
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2014-11-04  Ville Syrjälädrm/i915: Initialize new chv primary plane and pipe...
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2014-11-04  Ville Syrjälädrm/i915: Do vlv cmnlane toggle w/a in more cases
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2014-11-04  Ville Syrjälädrm/i915: Make sure DPLL is enabled when kicking the...
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2014-11-04  Ville Syrjälädrm/i915: Warn if stealing power sequencer from an...
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2014-11-04  Ville Syrjälädrm/i915: Warn if panel power is already on when enabling it
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2014-11-04  Ville Syrjälädrm/i915: Improve VDD/PPS debugs
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2014-11-04  Ville Syrjälädrm/i915: Steal power sequencer in vlv_power_sequencer_pipe()
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2014-11-04  Ville Syrjälädrm/i915: Warn if stealing non pipe A/B power sequencer
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2014-11-04  Ville Syrjälädrm/i915: Clear PPS port select when giving up the...
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2014-11-04  Ville Syrjälädrm/i915: Don't kick the power seqeuncer just to check...
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2014-11-04  Ville Syrjälädrm/i915: Kick the power sequencer before AUX transactions
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2014-11-04  Ville Syrjälädrm/i915: Fix eDP link training when switching pipes...
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2014-11-04  Ville Syrjälädrm/i915: Wait for PHY port ready before link training...
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2014-11-04  Ville Syrjälädrm/i915: Hold the pps mutex across the whole panel...
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2014-11-04  Ville Syrjälädrm/i915: Split power sequencer panel on/off functions...
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2014-11-04  Ville Syrjälädrm/i915: Don't initialize power seqeuencer delays...
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2014-11-04  Ville Syrjälädrm/i915: Store power sequencer delays in intel_dp
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2014-11-04  Ville Syrjälädrm/i915: Remove high level intel_edp_vdd_{on, off...
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2014-11-04  Ville Syrjälädrm/i915: Warn if trying to register eDP on port !...
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2014-10-27  Ville Syrjälädrm/i915: Fix GMBUSFREQ on vlv/chv
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2014-10-27  Ville Syrjälädrm/i915: Ignore long hpds on eDP ports
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2014-10-27  Ville Syrjälädrm/i915: Do a dummy DPCD read before the actual read
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2014-10-24  Ville Syrjälädrm/i915: Add rotation support for cursor plane (v5)
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2014-10-24  Ville Syrjälädrm/i915: Fix chv PCS DW11 register defines
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2014-10-24  Ville Syrjälädrm/i915: Don't claim that we're resetting PCH ADPA...
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2014-10-24  Ville Syrjälädrm/i915: Add missing '\n' to cdclk debug message
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2014-10-16  Ville Syrjälädrm/i915: Don't trust the DP_DETECT bit for eDP ports...
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2014-10-03  Ville Syrjälädrm/i915: Clear TX FIFO reset master override bits...
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2014-10-03  Ville Syrjälädrm/i915: Make sure hardware uses the correct swing...
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2014-10-02  Ville Syrjälädrm/i915: De-magic the PSR AUX message
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2014-09-29  Ville Syrjälädrm/i915: Don't spam dmesg with rps messages on vlv/chv
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2014-09-19  Ville Syrjälädrm/i915: Move vblank enable earlier and disable later
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2014-09-19  Ville Syrjälädrm/i915: Only set CURSOR_PIPE_CSC_ENABLE when cursor...
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2014-09-19  Ville Syrjälädrm/i915: Move the cursor_base setup to i{845, 9xx...
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2014-09-19  Ville Syrjälädrm/i915: Limit the watermark to at least 8 entries...
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2014-09-19  Ville Syrjälädrm/i915: Fix DVO 2x clock enable on 830M
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2014-09-18  Ville Syrjälädrm/i915: Add limited color range readout for HDMI...
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2014-09-08  Ville Syrjälädrm/i915: Wait for vblank before enabling the TV encoder
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2014-09-04  Ville Syrjälädrm/i915: Add comments explaining the vdd on/off functions
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2014-09-04  Ville Syrjälädrm/i915: Move DP port disable to post_disable for...
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2014-09-04  Ville Syrjälädrm/i915: Enable DP port earlier
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2014-09-04  Ville Syrjälädrm/i915: Turn on panel power before doing aux transfers
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2014-09-04  Ville Syrjälädrm/i915: Be more careful when picking the initial...
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2014-09-04  Ville Syrjälädrm/i915: Reset power sequencer pipe tracking when...
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2014-09-04  Ville Syrjälädrm/i915: Track which port is using which pipe's power...
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