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MIPS: Enable L2 prefetching for CM >= 2.5
2015-10-26  Paul BurtonMIPS: Enable L2 prefetching for CM >= 2.5
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-10-26  Paul BurtonMIPS: Introduce API for enabling & disabling L2 prefetch
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-10-26  Paul BurtonMIPS: Allow compact branch policy to be changed
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-10-02  Paul BurtonMIPS: Fix R2300 FP context switch handling
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-10-02  Paul BurtonMIPS: Fix octeon FP context switch handling
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-30  Paul BurtonMIPS: CPS: #ifdef on CONFIG_MIPS_MT_SMP rather than...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-30  Paul BurtonMIPS: CPS: Don't include MT code in non-MT kernels.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-30  Paul BurtonMIPS: CPS: Stop dangling delay slot from has_mt.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-27  Paul BurtonMIPS: Initialise MAARs on secondary CPUs
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-27  Paul BurtonMIPS: print MAAR configuration during boot
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-27  Paul BurtonMIPS: mm: compile maar_init unconditionally
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-27  Paul Burtonirqchip: mips-gic: Fix pending & mask reads for MIPS64...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-27  Paul Burtonirqchip: mips-gic: Convert CPU numbers to VP IDs.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
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2015-09-27  Paul BurtonMIPS: CM: Provide a function to map from CPU to VP ID.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Tidy up FPU context switching
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Select CONFIG_ARCH_USE_CMPXCHG_LOCKREF for MIPS64
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Drop EXPERIMENTAL tag from O32+FP64 & MSA
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Advertise MSA support via HWCAP when present
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Advertise MIPSr6 via HWCAP when appropriate
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: AT_HWCAP aux vector infrastructure
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Save MSA extended context around signals
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Add definitions for extended context
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Indicate FP mode in sigcontext sc_used_math
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Remove unused {get,put}_sigset functions
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Use common FP sigcontext code for O32 compat
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Skip odd double FP registers when copying FP32...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Move FP usage checks into protected_{save, restore...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Use struct mips_abi offsets to save FP context
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Add offsets to sigcontext FP fields to struct...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Simplify EVA FP context handling code
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: malta: Use generic platform_maar_init
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: mm: default platform_maar_init using bootmem...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-09-03  Paul BurtonMIPS: Introduce accessors for MSA vector registers
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-08-28  Paul BurtonMIPS: CPS: use 32b accesses to GCRs
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-08-26  Paul BurtonMIPS: Drop CONFIG_RUNTIME_DEBUG & debug.h
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-08-26  Paul BurtonMIPS: ops-emma2rh: Drop nonsensical db_assert
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-08-26  Paul BurtonMIPS: CM3: Add support for CM3 L2 cache.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-08-26  Paul BurtonMIPS: CM: Add GCR_L2_CONFIG register accessors
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-08-26  Paul BurtonMIPS: mips-cm: Implement mips_cm_revision
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-07-14  Paul BurtonMIPS: Require O32 FP64 support for MIPS64 with O32...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-07-10  Paul BurtonMIPS: c-r4k: Extend way_string array
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: i8259: DT support
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: Malta: Basic DT plumbing
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: include errno.h for ENODEV in mips-cm.h
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: Define GCR_GIC_STATUS register fields
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: Optimise non-EVA kernel user memory accesses
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: ingenic: Initial MIPS Creator CI20 support
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: ingenic: Initial JZ4780 support
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: use Ingenic SoC UART driver
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul Burtonserial: 8250_ingenic: support for Ingenic SoC UARTs
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul Burtondevicetree: document Ingenic SoC UART binding
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: only detect RAM size if not specified...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: remove clock.h
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul Burtonclk: ingenic: add JZ4780 CGU support
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS, clk: move jz4740 clock suspend, resume functions...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS, clk: move jz4740 UDC auto suspend functions to...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cgu
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS,clk: migrate JZ4740 to common clock framework
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul Burtonclk: ingenic: add driver for Ingenic SoC CGU clocks
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonDEVICETREE: Add Ingenic CGU binding documentation
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: replace use of jz4740_clock_bdata
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: Call jz4740_clock_init earlier
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS/IRQCHIP: Move Ingenic SoC intc driver to drivers...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: support newer SoC interrupt controllers
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: Avoid JZ4740-specific naming
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: read intc base address from DT
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: define IRQ numbers based on number of...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: support >32 interrupts
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: Remove jz_intc_base global
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: drop intc debugfs code
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: register an irq_domain for the interrupt...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: parse SoC interrupt controller parent...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: probe interrupt controller via DT
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul Burtondevicetree: document Ingenic SoC interrupt controller...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: Move arch_init_irq out of arch/mips/jz4740...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: use generic plat_irq_dispatch
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: probe CPU interrupt controller via DT
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonIRQCHIP: irq_cpu: declare irqchip table entry
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: require & include DT
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: ingenic: Add newer vendor IDs
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul BurtonMIPS: JZ4740: introduce CONFIG_MACH_INGENIC
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul Burtondevicetree/bindings: add Qi Hardware vendor prefix
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-06-21  Paul Burtondevicetree/bindings: add Ingenic Semiconductor vendor...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-05-12  Paul BurtonMIPS: fix FP mode selection in lieu of .MIPS.abiflags...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-03-27  Paul BurtonMIPS: disable FPU if the mode is unsupported
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-03-27  Paul BurtonMIPS: prevent FP context set via ptrace being discarded
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-03-27  Paul BurtonMIPS: Ensure FCSR cause bits are clear after invoking...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-03-27  Paul BurtonMIPS: clear MSACSR cause bits when handling MSA FP...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-03-27  Paul BurtonMIPS: wrap cfcmsa & ctcmsa accesses for toolchains...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-03-27  Paul BurtonMIPS: remove MSA macro recursion
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-03-27  Paul BurtonMIPS: assume at as source/dest of MSA copy/insert instructions
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-03-27  Paul BurtonMIPS: Push .set mips64r* into the functions needing it
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2015-02-12  Paul BurtonMIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2014-11-24  Paul BurtonMIPS: Kconfig option to better exercise/debug hybrid...
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2014-11-24  Paul BurtonMIPS: ELF: Set FP mode according to .MIPS.abiflags
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2014-11-24  Paul BurtonMIPS: ELF: Add definition for the .MIPS.abiflags section
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2014-11-24  Paul BurtonMIPS: Support for hybrid FPRs
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2014-11-24  Paul BurtonMIPS: Ensure Config5.UFE is clear on boot
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2014-11-24  Paul BurtonMIPS: detect presence of the FRE & UFR bits
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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2014-11-24  Paul BurtonMIPS: define bits introduced for hybrid FPRs
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
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