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drm/i915: Constify adjusted_mode
2015-09-30  Ville Syrjälädrm/i915: Constify adjusted_mode
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2015-09-30  Ville Syrjälädrm/i915: Move HDMI aspect ratio setup to .compute_config()
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2015-09-30  Ville Syrjälädrm/i915: Always use crtc_ timings when dealing with...
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2015-09-30  Ville Syrjälädrm/i915: s/mode/adjusted_mode/ in functions that really...
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2015-09-30  Ville Syrjälädrm/i915: Parametrize fence registers
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2015-09-30  Ville Syrjälädrm/i915: Always call the adjusted mode 'adjusted_mode'
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2015-09-30  Ville Syrjälädrm/i915: Use intel_panel for DVO fixed mode handling
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2015-09-24  Ville Syrjälädrm: Use vblank timestamps to guesstimate how many...
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2015-09-24  Ville Syrjälädrm: store_vblank() is never called with NULL timestamp
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2015-09-24  Ville Syrjälädrm: Clean up drm_calc_vbltimestamp_from_scanoutpos...
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2015-09-24  Ville Syrjälädrm: Limit the number of .get_vblank_counter() retries
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2015-09-24  Ville Syrjälädrm: Pass flags to drm_update_vblank_count()
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2015-09-24  Ville Syrjälädrm/i915: Fix vblank count variable types
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2015-09-24  Ville Syrjälädrm: Kill pixeldur_ns
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2015-09-24  Ville Syrjälädrm: Stop using linedur_ns and pixeldur_ns for vblank...
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2015-09-24  Ville Syrjälädrm: Move timestamping constants into drm_vblank_crtc
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2015-09-24  Ville Syrjälädrm: s/int crtc/unsigned int pipe/ straggles
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2015-09-23  Ville Syrjälädrm/i915: Parametrize CSR_PROGRAM registers
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2015-09-23  Ville Syrjälädrm/i915: Parametrize DDI_BUF_TRANS registers
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2015-09-23  Ville Syrjälädrm/i915: Parametrize TV luma/chroma filter registers
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2015-09-23  Ville Syrjälädrm/i915: Replace raw numbers with the approproate...
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2015-09-23  Ville Syrjälädrm/i915: Parametrize ILK turbo registers
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2015-09-23  Ville Syrjälädrm/i915: Parametrize FBC_TAG registers
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2015-09-23  Ville Syrjälädrm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS
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2015-09-23  Ville Syrjälädrm/i915: Parametrize LRC registers
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2015-09-23  Ville Syrjälädrm/i915: Don't pass sdvo_reg to intel_sdvo_select_...
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2015-09-23  Ville Syrjälädrm/i915: Ignore "digital output" and "not HDMI output...
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2015-09-23  Ville Syrjälädrm/i915: Make sure we don't detect eDP on g4x
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2015-09-23  Ville Syrjälädrm/i915: Implement stolen reserved detection for ctg/elk
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2015-09-23  Ville Syrjälädrm/i915: Move scanline_offset and timestamping constant...
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2015-09-23  Ville Syrjälädrm/i915: Move sprite/cursor plane disable to intel_sanitize...
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2015-09-23  Ville Syrjälädrm/i915: Assign hwmode after encoder state readout
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2015-09-14  Ville Syrjälädrm/i915: Set stolen reserved to 0 for pre-g4x platforms
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2015-09-10  Ville Syrjälädrm/i915: Don't try to use DDR DVFS on CHV when disabled...
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2015-09-09  Ville Syrjälädrm: Make drm_av_sync_delay() 'mode' argument const
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2015-09-09  Ville Syrjälädrm: Remove the 'mode' argument from drm_select_eld()
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2015-09-09  Ville Syrjälädrm: Make some modes const when iterating through them
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2015-09-08  Ville Syrjälädrm/dp: Use I2C_WRITE_STATUS_UPDATE to drain partial...
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2015-09-08  Ville Syrjälädrm/tegra: Handle I2C_WRITE_STATUS_UPDATE for address...
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2015-09-08  Ville Syrjälädrm/radeon: Handle DP_AUX_I2C_WRITE_STATUS_UPDATE
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2015-09-08  Ville Syrjälädrm/i915: Handle DP_AUX_I2C_WRITE_STATUS_UPDATE
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2015-09-08  Ville Syrjälädrm/dp: s/I2C_STATUS/I2C_WRITE_STATUS_UPDATE/
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2015-09-08  Ville Syrjälädrm/i2c/ch7006: Constify ch7006_tv_norms[] and ch7006_modes[]
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2015-09-08  Ville Syrjälädrm: Constify TV mode names
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2015-09-08  Ville Syrjälädrm: Constify generic_edid_names[]
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2015-09-04  Ville Syrjälädrm/i915: Dump pfit state as hex
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2015-09-02  Ville Syrjälädrm/i915: Don't call intel_get_hpd_pins() when there...
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2015-09-02  Ville Syrjälädrm/i915: Rewrite BXT HPD code to conform to pre-existing...
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2015-09-02  Ville Syrjälädrm/i915: Refactor the hpd irq handling functions
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2015-09-02  Ville Syrjälädrm/i915: Rewrite bxt_hpd_handler() to look like everyone...
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2015-09-02  Ville Syrjälädrm/i915: Reinitialize HPD after runtime D3
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2015-09-02  Ville Syrjälädrm/i915: Add port A HPD support for SPT
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2015-09-02  Ville Syrjälädrm/i915: Add port A HPD support for BDW
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2015-09-02  Ville Syrjälädrm/i915: LPT:LP needs port A HPD enabled in both north...
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2015-09-02  Ville Syrjälädrm/i915: Add port A HPD support for IVB/HSW
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2015-09-02  Ville Syrjälädrm/i915: Add port A HPD support for ILK/SNB
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2015-09-02  Ville Syrjälädrm/i915: Introduce spt_irq_handler()
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2015-09-02  Ville Syrjälädrm/i915: Move {pin, long}_mask initialization to caller...
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2015-09-02  Ville Syrjälädrm/i915: Rename BXT PORTA HPD defines
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2015-09-02  Ville Syrjälädrm/i915: Add HAS_PCH_LPT_LP() macro
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2015-09-02  Ville Syrjälädrm/i915: Factor out ilk_update_display_irq()
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2015-09-02  Ville Syrjälädrm/i915: Extract intel_hpd_enabled_irqs()
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2015-09-02  Ville Syrjälädrm/i915: Clean up various HPD defines
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2015-09-02  Ville Syrjälädrm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins...
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2015-09-02  Ville Syrjälädrm/dp: Add dp_aux_i2c_speed_khz module param to set...
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2015-09-02  Ville Syrjälädrm/dp: Adjust i2c-over-aux retry count based on message...
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2015-09-02  Ville Syrjälädrm/dp: Define AUX_RETRY_INTERVAL as 500 us
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2015-09-01  Ville Syrjälädrm/i915: Factor out intel_crtc_has_encoders()
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2015-09-01  Ville Syrjälädrm/i915: Fix clock readout when pipes are enabled...
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2015-09-01  Ville Syrjälädrm/i915: Add CHV PHY LDO power sanity checks
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2015-09-01  Ville Syrjälädrm/i915: Add some CHV DPIO lane power state asserts
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2015-09-01  Ville Syrjälädrm/i915: Clean up CHV lane soft reset programming
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2015-09-01  Ville Syrjälädrm/i915: Don't use link_bw for PLL setup
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2015-08-31  Ville Syrjälädrm/radeon/atom: Send out the full AUX address
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2015-08-31  Ville Syrjälädrm/i915: Check DP link status on long hpd too
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2015-08-26  Ville Syrjälädrm/i915: Force CL2 off in CHV x1 PHY
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2015-08-26  Ville Syrjälädrm/i915: Enable DPIO SUS clock gating on CHV
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2015-08-26  Ville Syrjälädrm/i915: Force common lane on for the PPS kick on CHV
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2015-08-26  Ville Syrjälädrm/i915: Trick CL2 into life on CHV when using pipe...
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2015-08-26  Ville Syrjälädrm/i915: Implement PHY lane power gating for CHV
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2015-08-26  Ville Syrjälädrm/i915: Move DPLL ref/cri/VGA mode frobbing to the...
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2015-08-26  Ville Syrjälädrm/i915: Make some string arrays const
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2015-08-26  Ville Syrjälädrm/i915: Use ARRAY_SIZE() instead of hand rolling it
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2015-08-26  Ville Syrjälädrm/i915: Fix some gcc warnings
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2015-08-26  Ville Syrjälädrm/i915: Add vlv_dport_to_phy()
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2015-08-26  Ville Syrjälädrm/i915: Move VLV/CHV prepare_pll later
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2015-08-26  Ville Syrjälädrm/i915: Add locking around chv_phy_control_init()
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2015-08-26  Ville Syrjälädrm/i915: Move DPIO port init earlier
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2015-08-26  Ville Syrjälädrm/i915: Add encoder->post_pll_disable() hooks and...
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2015-08-26  Ville Syrjälädrm/i915: Always program unique transition scale for CHV
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2015-08-26  Ville Syrjälädrm/i915: Always program m2 fractional value on CHV
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2015-08-26  Ville Syrjälädrm/i915: Put back lane_count into intel_dp and add...
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2015-08-14  Ville Syrjälädrm/i915: Kill intel_dp->{link_bw, rate_select}
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2015-08-14  Ville Syrjälädrm/i915: Don't use link_bw to select between TP1 and TP3
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2015-08-14  Ville Syrjälädrm/i915: Move intel_dp->lane_count into pipe_config
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2015-08-14  Ville Syrjälädrm/i915: Avoid confusion between DP and TRANS_DP_CTL...
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2015-08-14  Ville Syrjälädrm/i915: Don't pass clock to DDI PLL select functions
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2015-08-14  Ville Syrjälädrm/i915: Don't use link_bw for PLL setup
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2015-08-14  Ville Syrjälädrm/i915: Clean up DP/HDMI limited color range handling
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2015-08-14  Ville Syrjälädrm/i915: clflush on pin_to_display after pwrite to...
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