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Correct PR number in changelog
2020-06-03  Jan Beulichld: fix ld-elf/linux-x86.exp for r/o source tree
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2020-03-13  Jan Beulichx86-64: correct mis-named X86_64_0D enumerator
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2020-03-09  Jan Beulichx86: use template for AVX512 integer comparison insns
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2020-03-09  Jan Beulichx86: use template for XOP integer comparison, shift...
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2020-03-09  Jan Beulichx86: use template for AVX/AVX512 floating point comparison...
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2020-03-09  Jan Beulichx86: use template for SSE floating point comparison...
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2020-03-09  Jan Beulichx86: allow opcode templates to be templated
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2020-03-06  Jan Beulichx86: reduce amount of various VCVT* templates
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2020-03-06  Jan Beulichx86: drop/replace IgnoreSize
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2020-03-06  Jan Beulichx86: fold (supposed to be) identical code
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2020-03-06  Jan Beulichx86: don't accept FI{LD,STP,STTP}LL in Intel syntax...
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2020-03-06  Jan Beulichx86: replace NoRex64 on VEX-encoded insns
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2020-03-06  Jan Beulichx86: drop Rex64 attribute
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2020-03-06  Jan Beulichx86: correct MPX insn w/o base or index encoding in...
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2020-03-06  Jan Beulichx86: add missing IgnoreSize
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2020-03-06  Jan Beulichx86: refine TPAUSE and UMWAIT
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2020-03-04  Jan Beulichx86: support VMGEXIT
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2020-02-17  Jan Beulichx86: fold certain VCVT{,U}SI2S{S,D} templates
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2020-02-17  Jan Beulichx86: fold AddrPrefixOpReg templates
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2020-02-17  Jan Beulichx86/Intel: don't swap operands of MONITOR{,X} and MWAIT{,X}
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2020-02-17  Jan Beulichx86/Intel: improve diagnostics for ambiguous VCVT*...
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2020-02-14  Jan Beulichx86: replace adhoc (partly wrong) ambiguous operand...
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2020-02-14  Jan Beulichx86: adjust segment override prefix emission
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2020-02-14  Jan Beulichx86: optimize away pointless segment overrides
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2020-02-14  Jan Beulichx86: extend LEA's segment override warning
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2020-02-13  Jan Beulichx86: fix SSE4a dependencies of ".arch .nosse*"
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2020-02-12  Jan Beulichx86: correct VFPCLASSP{S,D} operand size handling
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2020-02-12  Jan Beulichx86: fold two JMP templates
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2020-02-12  Jan Beulichx86-64: Intel64 adjustments for insns dealing with...
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2020-02-12  Jan Beulichx86: also disallow non-byte/-word registers with byte...
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2020-02-12  Jan Beulichx86/Intel: improve diagnostics
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2020-02-11  Jan Beulichx86: drop ShortForm attribute
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2020-02-11  Jan Beulichx86: drop stray ShortForm attributes
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2020-01-31  Jan Beulichx86: replace EXxmm_mdq by EXVexWdqScalar
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2020-01-31  Jan Beulichx86: drop unused EXVexWdq / vex_w_dq_mode
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2020-01-30  Jan Beulichx86: prevent undue use of GOT32X and alike relocations
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2020-01-30  Jan Beulichld/doc: drop blank between @option and brace
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2020-01-30  Jan Beulichx86-64: honor vendor specifics for near RET
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2020-01-30  Jan Beulichx86-64: also diagnose far returns / IRET with ambiguous...
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2020-01-30  Jan Beulichx86: drop further pointless/bogus DefaultSize
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2020-01-21  Jan Beulichx86: testsuite adjustments after commit 1a0351246a5c
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2020-01-21  Jan Beulichx86: replace adhoc ambiguous operand checking for CRC32
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2020-01-21  Jan Beulichx86: improve handling of insns with ambiguous operand...
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2020-01-21  Jan Beulichx86: VCVTNEPS2BF16{X,Y} should permit broadcasting
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2020-01-16  Jan Beulichx86: drop found_cpu_match local variable
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2020-01-16  Jan Beulichx86: drop stale Vec_Imm4 related comment
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2020-01-16  Jan Beulichx86: add a few more missing VexWIG
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2020-01-16  Jan Beulichx86: VPEXTRQ/VPINSRQ are unavailable outside of 64...
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2020-01-09  Jan Beulichx86: refine when to trigger optimizations
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2020-01-09  Jan Beulichx86-64: assert sane internal state for REX conversions
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2020-01-09  Jan Beulichx86: consistently convert to byte registers for TEST...
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2020-01-09  Jan Beulichx86: SYSENTER/SYSEXIT are unavailable in 64-bit mode...
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2020-01-03  Jan BeulichArm64: correct address index operands for LD1RO{H,W,D}
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2020-01-03  Jan BeulichArm64: correct {su,us}dot SIMD encodings
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2020-01-03  Jan BeulichArm64: correct uzp{1,2} mnemonics
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2020-01-03  Jan BeulichArm64: correct 64-bit element fmmla encoding
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2020-01-03  Jan BeulichMach-O: misc build adjustments
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2019-12-27  Jan Beulichx86: adjust ignored prefix warning for branches
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2019-12-27  Jan Beulichx86-64: correct / adjust prefix emission
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2019-12-27  Jan Beulichx86-64: fix Intel64 handling of branch with data16...
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2019-12-27  Jan Beulichx86: consolidate Disp<NN> handling a little
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2019-12-23  Jan Beulichppc: misc minor build corrections
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2019-12-11  Jan Beulichx86: further refine SSE check (SSE4a, SHA, GFNI)
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2019-12-09  Jan Beulichx86/Intel: fold "xmmword" with "oword"
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2019-12-09  Jan Beulichx86/Intel: support "mmword ptr"
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2019-12-09  Jan Beulichx86/Intel: fix "near ptr" / "far ptr" handling
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2019-12-09  Jan Beulichx86/Intel: drop pointless suffix setting for "tbyte...
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2019-12-09  Jan Beulichx86/Intel: drop pointless suffix setting for "fword...
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2019-12-09  Jan Beulichx86/Intel: drop pointless special casing of LxS
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2019-12-05  Jan BeulichArm64: simplify Crypto arch extension handling
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2019-12-05  Jan BeulichArm64: correct "sha3" arch-extension directive handling
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2019-12-04  Jan Beulichx86-64: accept 64-bit LFS/LGS/LSS forms with suffix...
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2019-12-04  Jan Beulichx86-64/Intel: fix CALL/JMP with dword operand
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2019-12-04  Jan Beulichx86: consolidate tracking of MMX register use
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2019-12-04  Jan Beulichx86/Intel: extend MOVDIRI testing
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2019-12-04  Jan Beulichx86: make sure all PUSH/POP honor DefaultSize
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2019-12-04  Jan Beulichx86: drop some stray/bogus DefaultSize
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2019-11-14  Jan Beulichx86: drop redundant SYSCALL/SYSRET templates
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2019-11-14  Jan Beulichx86: fold individual Jump* attributes into a single...
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2019-11-14  Jan Beulichx86: make JumpAbsolute an insn attribute
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2019-11-14  Jan Beulichx86: make AnySize an insn attribute
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2019-11-14  Jan Beulichx86/Intel: correct CMPSD test cases' regexp closing...
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2019-11-14  Jan Beulichx86/Intel: extend MOVSD/CMPSD testsuite coverage
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2019-11-12  Jan Beulichx86: fold EsSeg into IsString
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2019-11-12  Jan Beulichx86: eliminate ImmExt abuse
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2019-11-12  Jan Beulichx86: introduce operand type "instance"
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2019-11-11  Jan BeulichArm64: SVE2's smaxp/sminp require operands 1 and 3...
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2019-11-11  Jan BeulichArm64: fix build with old glibc
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2019-11-08  Jan Beulichx86: convert RegMask and RegBND from bitfield to enumerator
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2019-11-08  Jan Beulichx86: convert RegSIMD and RegMMX from bitfield to enumerator
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2019-11-08  Jan Beulichx86: convert Control/Debug/Test from bitfield to enumerator
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2019-11-08  Jan Beulichx86: convert SReg from bitfield to enumerator
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2019-11-08  Jan Beulichx86: introduce operand type "class"
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2019-11-07  Jan Beulichx86: support further AMD Zen2 instructions
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2019-11-07  Jan Beulichx86: adjust register names printed for MONITOR/MWAIT
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2019-11-07  Jan Beulichx86/Intel: drop IgnoreSize from operand-less MOVSD...
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2019-11-05  Jan Beulichx86: fold OP_Mwaitx() into OP_Mwait()
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2019-11-05  Jan Beulichx86: split MONITORX/MWAITX entries
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2019-11-05  Jan Beulichx86: consolidate disassembler enum naming a little
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2019-11-04  Jan Beulichx86: re-arrange process_operands()
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GDB Binutils - Deliverables
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