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drm/i915: Update CDCLK_FREQ register on BDW after changing cdclk frequency
2016-04-28  Ville Syrjälädrm/i915: Update CDCLK_FREQ register on BDW after changing...
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2016-04-27  Ville Syrjälädrm/i915: Update RAWCLK_FREQ register on VLV/CHV
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2016-04-27  Ville Syrjälädrm/i915: Unify VLV/CHV DPOunit clock gating disable...
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2016-04-22  Ville Syrjälädrm/i915: Make RPS EI/thresholds multiple of 25 on...
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2016-04-19  Ville Syrjälädrm/i915: Wait for power cycle delay after turning...
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2016-04-19  Ville Syrjälädrm/i915: Define HSW/BDW display power domains the...
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2016-04-19  Ville Syrjälädrm/i915: Define VLV/CHV display power well domains...
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2016-04-19  Ville Syrjälädrm/i915: Set .domains=POWER_DOMAIN_MASK for the always...
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2016-04-19  Ville Syrjälädrm/i915: Fix oops in vlv_force_pll_on()
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2016-04-18  Ville Syrjälädrm/i915: Replace nondescript 'WARN_ON(!lret)' with...
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2016-04-15  Ville Syrjälädrm/i915: Reject 'Center' scaling mode for eDP/DSI...
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2016-04-15  Ville Syrjälädrm/i915: Hook up pfit for DSI
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2016-04-15  Ville Syrjälädrm/i915: Eliminate {vlv,bxt}_configure_dsi_pll()
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2016-04-15  Ville Syrjälädrm/i915: Compute DSI PLL parameters during .compute_config()
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2016-04-15  Ville Syrjälädrm/i915: Setup DPLL/DPLLMD for DSI too on VLV/CHV
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2016-04-14  Ville Syrjälädrm/i915: Use fw_domains_put_with_fifo() on HSW
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2016-04-14  Ville Syrjälädrm/i915: Split gen8_gt_irq_handler into ack+handle
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2016-04-14  Ville Syrjälädrm/i915: Eliminate passing dev+dev_priv to {snb,ilk...
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2016-04-14  Ville Syrjälädrm/i915: Move gt/pm irq handling out from irq disabled...
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2016-04-14  Ville Syrjälädrm/i915: Split VLV/CVH PIPESTAT handling into ack...
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2016-04-14  Ville Syrjälädrm/i915: Split PORT_HOTPLUG_STAT ack out from i9xx_hpd_irq_...
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2016-04-14  Ville Syrjälädrm/i915: Move variables to narrower scope in VLV/CHV...
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2016-04-14  Ville Syrjälädrm/i915: Eliminate loop from VLV irq handler
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2016-04-14  Ville Syrjälädrm/i915: Clear VLV_IER around irq processing
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2016-04-14  Ville Syrjälädrm/i915: Clear VLV_MASTER_IER around irq processing
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2016-04-14  Ville Syrjälädrm/i915: Clear VLV_IIR after PIPESTAT
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2016-04-14  Ville Syrjälädrm/i915: Set up VLV_MASTER_IER consistently
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2016-04-14  Ville Syrjälädrm/i915: Use GEN8_MASTER_IRQ_CONTROL consistently
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2016-04-14  Ville Syrjälädrm/i915: Ignore GTFIFODBG FIFO free entry fields on CHV
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2016-04-12  Ville Syrjälädrm/i915: Don't read out port_clock on CHV when DPLL...
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2016-04-12  Ville Syrjälädrm/i915: Dump pfit PGM_RATIOS as hex
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2016-04-12  Ville Syrjälädrm/i915: Fix CHV DSI PLL refclk during state readout
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2016-04-12  Ville Syrjälädrm/i915: Power down the DSI PLL before reconfiguring it
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2016-04-12  Ville Syrjälädrm/i915: Change lfsr_converts[] to u16
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2016-04-12  Ville SyrjäläRevert "drm/i915: Limit the auto arming of mmio debugs...
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2016-04-12  Ville Syrjälädrm/i915: Move DPINVGTT setup to vlv_display_irq_reset()
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2016-04-12  Ville Syrjälädrm/i915: Move vlv_init_display_clock_gating() to the...
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2016-04-12  Ville Syrjälädrm/i915: Warn if irq_mask isn't ~0 during vlv/cvh...
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2016-04-12  Ville Syrjälädrm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall()
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2016-04-12  Ville Syrjälädrm/i915: Clear display interrupt before enabling when...
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2016-04-12  Ville Syrjälädrm/i915: Move vlv/chv display irq code to a more logical...
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2016-04-12  Ville Syrjälädrm/i915: Skip display irq setup if display irqs aren...
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2016-04-12  Ville Syrjälädrm/i915: Fix up vlv/chv display irq setup
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2016-04-12  Ville Syrjälädrm/i915: Remove "VLV magic" from irq setup
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2016-04-12  Ville Syrjälädrm/i915: Replace ILK eDP underrun suppression with...
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2016-04-12  Ville Syrjälädrm/i915: Make sure LP1+ watermarks levels are preserved...
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2016-04-12  Ville Syrjälädrm/i915: Try to shut up more ILK underruns
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2016-04-12  Ville Syrjälädrm/i915: Get panel_type from OpRegion panel details
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2016-04-12  Ville Syrjälädrm/i915: Replace the static panel_type variable with...
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2016-04-12  Ville Syrjälädrm/i915: Reject panel_type > 0xf from VBT
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2016-04-12  Ville Syrjälädrm/i915: Make GMBUS timeout message DRM_DEBUG_KMS
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2016-04-12  Ville Syrjälädrm/i915: Restore GMBUS operation after a failed bit...
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2016-04-12  Ville Syrjälädrm/i915: Protect force_bit with gmbus_mutex
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2016-04-05  Ville Syrjälädrm/i915: Set GPU freq to idle_freq initially
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2016-04-05  Ville Syrjälädrm/i915: Use GPLL ref clock to calculate GPU freqs...
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2016-04-01  Ville Syrjälädrm/i915: Fix plane init failure paths
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2016-04-01  Ville Syrjälädrm/i915: Remove the "three times for luck" trick from...
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2016-04-01  Ville Syrjälädrm/i915: assert_panel_unlocked() in chv_enable_pll()
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2016-04-01  Ville Syrjälädrm/i915: Add a local pipe variable to vlv_enable_pll()
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2016-04-01  Ville Syrjälädrm/i915: Implement WaPixelRepeatModeFixForC0:chv
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2016-04-01  Ville Syrjälädrm/i915: Make {vlv,chv}_{disable,update}_pll() more...
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2016-04-01  Ville Syrjälädrm/i915: Throw out BUGs from DPLL/PCH functions
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2016-04-01  Ville Syrjälädrm/i915: Disable FDI RX before DDI_BUF_CTL
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2016-03-13  Ville Syrjälädrm/edid: Extract SADs properly from multiple audio...
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2016-03-11  Ville Syrjälädrm/i915: Actually retry with bit-banging after GMBUS...
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2016-03-10  Ville Syrjälädrm/i915: s/crtc_state/old_crtc_state/ in intel_atomic_commit()
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2016-03-10  Ville Syrjälädrm/i915: Wait for vblank after cxsr disable in pre_plane_update
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2016-03-10  Ville Syrjälädrm/i915: Fix watermarks for VLV/CHV
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2016-03-10  Ville Syrjälädrm/i915: Pass the correct crtc state to .update_plane()
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2016-03-10  Ville SyrjäläRevert "drm/i915: Enable PSR by default on Valleyview...
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2016-03-09  Ville Syrjälädrm/i915: Actually retry with bit-banging after GMBUS...
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2016-03-04  Ville Syrjälädrm/i915: Use DIV_ROUND_CLOSEST for PWM calculations
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2016-03-04  Ville Syrjälädrm/i915: Clean up .get_aux_clock_divider() functions
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2016-03-04  Ville Syrjälädrm/i915: Read out hrawclk from CCK on vlv/chv
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2016-03-04  Ville Syrjälädrm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV
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2016-03-04  Ville Syrjälädrm/i915: Rename s/i9xx/g4x/ in DP code
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2016-03-04  Ville Syrjälädrm/i915: Store rawclk_freq in dev_priv
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2016-03-01  Ville Syrjälädrm/i915: Try to fix CRT port clock limits
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2016-03-01  Ville Syrjälädrm/i915: Read out VGA dotclock properly on LPT
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2016-03-01  Ville Syrjälädrm/i915: Make the LPT iclkip 20MHz case more generic
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2016-03-01  Ville Syrjälädrm/i915: Remove the SPLL==270Mhz assumption from intel_fdi_...
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2016-03-01  Ville Syrjälädrm/i915: Move the encoder vs. FDI dotclock check out...
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2016-03-01  Ville Syrjälädrm/i915: Dump ddi_pll_sel in hex instead of decimal...
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2016-03-01  Ville Syrjälädrm/i915: Embed rotation_info under intel_framebuffer
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2016-03-01  Ville Syrjälädrm/i915: Move the NULL sg handling out from rotate_pages()
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2016-03-01  Ville Syrjälädrm/i915: Reorganize intel_rotation_info
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2016-03-01  Ville Syrjälädrm/i915: Pass drm_frambuffer to intel_compute_page_offset()
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2016-03-01  Ville Syrjälädrm/i915: Don't pass plane+plane_state to intel_pin_and_fenc...
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2016-03-01  Ville Syrjälädrm/i915: Support for extra alignment for tiled surfaces
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2016-03-01  Ville Syrjälädrm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4...
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2016-03-01  Ville Syrjälädrm/i915: s/tile_width/tile_width_bytes/
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2016-03-01  Ville Syrjälädrm/i915: Account for the size of the chroma plane...
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2016-02-26  Ville SyrjäläALSA: hda - Autosuspend controller after probe even...
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2016-02-22  Ville Syrjälädrm/i915: Add for_each_pipe_masked()
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2016-02-22  Ville Syrjälädrm/i915: Make sure pipe interrupts are processed before...
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2016-02-22  Ville Syrjälädrm/i915: synchronize_irq() before turning off disp2d...
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2016-02-22  Ville Syrjälädrm/i915: Skip PIPESTAT reads from irq handler on VLV...
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2016-02-18  Ville Syrjälädrm/i915: Extract intel_encoder_has_connectors()
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2016-02-17  Ville Syrjälädrm/i915: Fix hpd live status bits for g4x
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2016-02-15  Ville Syrjälädrm/i915: Add missing 'else' to intel_digital_port_connected()
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