| 2018-07-31 |
 Jan Beulich | x86: fold various AVX512 templates with so far differing...
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| 2018-07-31 |
Jan Beulich | x86: add more exhaustive tests for invalid AVX512 zeroing...
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| 2018-07-31 |
Jan Beulich | x86/Intel: correct permitted operand sizes for AVX512...
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| 2018-07-31 |
Jan Beulich | x86: don't abort() upon DATA16 prefix on (E)VEX encoded...
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| 2018-07-31 |
Jan Beulich | x86: drop CpuVREX
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| 2018-07-30 |
Jan Beulich | x86: don't mistakenly scale non-8-bit displacements
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| 2018-07-24 |
Jan Beulich | x86-64: correct AVX512F vcvtsi2s{d,s} handling
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| 2018-07-19 |
Jan Beulich | x86: fold narrowing VCVT* templates
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| 2018-07-19 |
Jan Beulich | x86: fold VFPCLASSP{D,S} templates
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| 2018-07-19 |
Jan Beulich | x86: fold various AVX512* templates
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| 2018-07-19 |
Jan Beulich | x86: fold various AVX512DQ templates
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| 2018-07-19 |
Jan Beulich | x86: fold various AVX512BW templates
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| 2018-07-19 |
Jan Beulich | x86: fold various AVX512CD templates
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| 2018-07-19 |
Jan Beulich | x86: fold various AVX512VL templates into their AVX512F...
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| 2018-07-19 |
Jan Beulich | x86: pre-process opcodes table before parsing
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| 2018-07-16 |
Jan Beulich | x86: fix operand size checking
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| 2018-07-11 |
Jan Beulich | x86: adjust monitor/mwait templates
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| 2018-07-11 |
Jan Beulich | x86: drop {,reg16_}inoutportreg variables
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| 2018-07-11 |
Jan Beulich | x86: simplify legacy prefix emission
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| 2018-07-11 |
Jan Beulich | x86/Intel: accept memory operand size specifiers for...
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| 2018-07-11 |
Jan Beulich | x86: replace off-by-one OTMax
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| 2018-07-11 |
Jan Beulich | x86: fix "REP RET" with -madd-bnd-prefix
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| 2018-06-01 |
Jan Beulich | x86: fold MOV to/from segment register templates
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| 2018-06-01 |
Jan Beulich | x86: don't emit REX.W for SLDT and STR
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| 2018-06-01 |
Jan Beulich | x86: relax redundant REX prefix check
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| 2018-06-01 |
Jan Beulich | x86: simplify control register check
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| 2018-06-01 |
Jan Beulich | x86: tighten condition for emitting LOCK on control...
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| 2018-06-01 |
Jan Beulich | x86/Intel: accept "oword ptr" for INVPCID
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| 2018-04-26 |
Jan Beulich | x86: fold various non-memory operand AVX512VL templates
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| 2018-04-26 |
Jan Beulich | x86: also optimize zeroing-masking variants of insns
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| 2018-04-26 |
Jan Beulich | x86: properly force / avoid forcing EVEX encoding
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| 2018-04-26 |
Jan Beulich | x86: CpuXSAVE is a prereq for various other features
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| 2018-04-26 |
Jan Beulich | x86: drop CpuRegMMX, CpuReg[XYZ]MM, and CpuRegMask
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| 2018-04-26 |
Jan Beulich | x86: don't recognize bnd<N> as registers without CpuMPX
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| 2018-04-26 |
Jan Beulich | x86: x87-related adjustments
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| 2018-04-26 |
Jan Beulich | x86: fix indentation in build_modrm_byte()
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| 2018-04-26 |
Jan Beulich | x86: move and fold common code in build_modrm_byte()
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| 2018-04-26 |
Jan Beulich | x86: drop VexImmExt
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| 2018-04-26 |
Jan Beulich | x86: tighten assertion in build_modrm_byte()
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| 2018-04-26 |
Jan Beulich | x86: drop dead code from build_modrm_byte()
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| 2018-04-25 |
Jan Beulich | x86: drop redundant AVX512VL shift templates
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| 2018-03-28 |
Jan Beulich | x86: drop VecESize
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| 2018-03-28 |
Jan Beulich | x86: convert broadcast insn attribute to boolean
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| 2018-03-28 |
Jan Beulich | x86: fold to-scalar-int conversion insns
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| 2018-03-28 |
Jan Beulich | x86: don't show suffixes for to-scalar-int conversion...
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| 2018-03-22 |
Jan Beulich | x86: use local variable in check_VecOperands()
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| 2018-03-22 |
Jan Beulich | x86: drop pointless VecESize
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| 2018-03-22 |
Jan Beulich | x86: drop remaining redundant DispN
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| 2018-03-22 |
Jan Beulich | ix86: allow HLE store of accumulator to absolute address
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| 2018-03-22 |
Jan Beulich | x86: fix swapped operand handling for BNDMOV
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| 2018-03-22 |
Jan Beulich | x86/Intel: fix fallout from earlier template folding
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| 2018-03-22 |
Jan Beulich | x86: fold a few XOP templates
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| 2018-03-08 |
Jan Beulich | x86: fold several AVX512VL templates
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| 2018-03-08 |
Jan Beulich | x86: fold certain AVX512 rotate and shift templates
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| 2018-03-08 |
Jan Beulich | x86: fold VEX-encoded GFNI templates
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| 2018-03-08 |
Jan Beulich | x86: fold a few AVX512F templates
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| 2018-03-08 |
Jan Beulich | x86: fold LWP templates
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| 2018-03-08 |
Jan Beulich | x86: fold FMA and FMA4 templates
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| 2018-03-08 |
Jan Beulich | x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIX
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| 2018-03-08 |
Jan Beulich | x86: correct operand size match checks for BMI/BMI2...
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| 2018-03-08 |
Jan Beulich | x86: fold redundant expressions in process_suffix()
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| 2018-03-08 |
Jan Beulich | x86: simplify result processing of cpu_flags_match()
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| 2018-03-08 |
Jan Beulich | x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()
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| 2018-03-08 |
Jan Beulich | x86: change AVX512VL handling in cpu_flags_match()
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| 2018-03-08 |
Jan Beulich | x86: drop CPU_FLAGS_32BIT_MATCH
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| 2018-03-08 |
Jan Beulich | x86: simplify AVX checks in cpu_flags_match()
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| 2018-03-08 |
Jan Beulich | x86: avoid cpu_flags_match() bogusly setting CPU_FLAGS_ARCH_...
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| 2018-03-08 |
Jan Beulich | x86: drop bogus NoAVX
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| 2018-03-08 |
Jan Beulich | x86: avoid SSE check for LDMXCSR/STMXCSR
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| 2018-03-08 |
Jan Beulich | x86: extend SSE check to PCLMULQDQ, AES, and GFNI insns
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| 2018-03-08 |
Jan Beulich | x86: drop FloatD
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| 2018-03-08 |
Jan Beulich | x86/Intel: correct disassembly of fsub*/fdiv*
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| 2018-03-08 |
Jan Beulich | x86: adjust 4-XMM-register-group related warning
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| 2018-03-08 |
Jan Beulich | x86: bogus VMOVD with 64-bit operands should only allow...
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| 2018-03-08 |
Jan Beulich | x86: fold AVX vcvtpd2ps memory forms
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| 2018-01-10 |
Jan Beulich | x86: fix Disp8 handling for scalar AVX512_4FMAPS insns
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| 2018-01-10 |
Jan Beulich | x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants
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| 2018-01-02 |
Jan Beulich | x86: partial revert of 10c17abdd0
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| 2017-12-18 |
Jan Beulich | x86: fold certain AVX and AVX2 templates
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| 2017-12-18 |
Jan Beulich | x86: fold RegXMM/RegYMM/RegZMM into RegSIMD
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| 2017-12-18 |
Jan Beulich | x86: drop FloatReg and FloatAcc
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| 2017-12-18 |
Jan Beulich | x86: replace Reg8, Reg16, Reg32, and Reg64
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| 2017-12-15 |
Jan Beulich | x86: correct operand type checks
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| 2017-12-15 |
Jan Beulich | x86: drop stray CheckRegSize uses
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| 2017-12-15 |
Jan Beulich | x86: correct abort check
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| 2017-11-30 |
Jan Beulich | x86: derive DispN from BaseIndex
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| 2017-11-30 |
Jan Beulich | x86: drop Vec_Disp8
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| 2017-11-30 |
Jan Beulich | x86/Intel: issue diagnostics for redundant segment...
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| 2017-11-30 |
Jan Beulich | Revert "x86: Update segment register check in Intel...
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| 2017-11-24 |
Jan Beulich | x86: reject further invalid AVX-512 masking constructs
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| 2017-11-24 |
Jan Beulich | x86: don't omit disambiguating suffixes from "fi*"
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| 2017-11-23 |
Jan Beulich | x86: fix AVX-512 16-bit addressing
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| 2017-11-23 |
Jan Beulich | x86-64: always use unsigned 32-bit reloc for 32-bit...
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| 2017-11-23 |
Jan Beulich | x86: drop redundant VSIB handling code
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| 2017-11-23 |
Jan Beulich | x86: correct UDn
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| 2017-11-23 |
Jan Beulich | x86/Intel: don't report multiple errors for a single...
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| 2017-11-16 |
Jan Beulich | x86: ignore high register select bit(s) in 32- and...
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| 2017-11-16 |
Jan Beulich | ix86/Intel: don't require memory operand size specifier...
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| 2017-11-15 |
Jan Beulich | x86: use correct register names
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| 2017-11-15 |
Jan Beulich | x86: drop VEXI4_Fixup()
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